Electronic Components Datasheet Search |
|
IDT5P49EE801 Datasheet(PDF) 2 Page - Integrated Device Technology |
|
IDT5P49EE801 Datasheet(HTML) 2 Page - Integrated Device Technology |
2 / 26 page IDT5P49EE801 VERSACLOCK® LOW POWER CLOCK GENERATOR EEPROM CLOCK GENERATOR IDT™ VERSACLOCK® LOW POWER CLOCK GENERATOR 2 IDT5P49EE801 REV C 061810 Functional Block Diagram Note: OUT6A & OUT6B pair can be configured to be LVDS or two single-ended LVTTL outputs. PLL A PL LB (SS) PL LC PL LD XIN/R E F XO UT SD A SCL S E L [1 :0 ] R E F SEL0 R E F SEL2 Co ntro l Logic 32 kX IN 32 kX O U T R E F SEL1 R E F SEL3 GND VDD VD DO 2 VDD O 1 VD DO 3 /D IV 6 OUT 6A OU T 6B /D IV 4 OU T 4 S R C 4 /D IV 3 OUT 3 S R C 3 /D IV 2 OU T 2 S R C 2 /D IV 1 OU T 1 S R C 1 /D IV 0 OU T 0 S R C 0 /D IV 5 OU T 5 S R C 5 S R C 6 |
Similar Part No. - IDT5P49EE801 |
|
Similar Description - IDT5P49EE801 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |