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9DB403DGLF Datasheet(PDF) 11 Page - Integrated Device Technology |
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9DB403DGLF Datasheet(HTML) 11 Page - Integrated Device Technology |
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11 / 19 page 
IDTTM/ICSTM Four Output Differential Buffer for PCIe Gen 1 and Gen 2 ICS9DB403D REV L 10/07/09 ICS9DB403D Four Output Differential Buffer for PCIe for Gen 1 and Gen 2 11 General SMBus serial interface information for the ICS9DB403D How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address DC (h) • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ICS clock will acknowledge • Controller (host) sends the data byte count = X • ICS clock will acknowledge • Controller (host) starts sending Byte N through Byte N + X -1 • ICS clock will acknowledge each byte one at a time • Controller (host) sends a Stop bit How to Read: • Controller (host) will send start bit. • Controller (host) sends the write address DC (h) • ICS clock will acknowledge • Controller (host) sends the begining byte location = N • ICS clock will acknowledge • Controller (host) will send a separate start bit. • Controller (host) sends the read address DD (h) • ICS clock will acknowledge • ICS clock will send the data byte count = X • ICS clock sends Byte N + X -1 • ICS clock sends Byte 0 through byte X (if X (h) was written to byte 8). • Controller (host) will need to acknowledge each byte • Controllor (host) will send a not acknowledge bit • Controller (host) will send a stop bit ICS (Slave/Receiver) T WR ACK ACK ACK ACK ACK PstoP bit Index Block Write Operation Slave Address DC(h) Beginning Byte = N WRite starT bit Controller (Host) Byte N + X - 1 Data Byte Count = X Beginning Byte N T starT bit WR WRite RT Repeat starT RD ReaD Beginning Byte N Byte N + X - 1 N Not acknowledge PstoP bit Slave Address DD(h) Index Block Read Operation Slave Address DC(h) Beginning Byte = N ACK ACK Data Byte Count = X ACK ICS (Slave/Receiver) Controller (Host) ACK ACK |
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