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9FG830AFILF Datasheet(PDF) 7 Page - Integrated Device Technology |
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9FG830AFILF Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 19 page IDT® Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 1680C—08/26/10 9FG830 Eight Output Differential Frequency Generator for PCIe Gen3 and QPI 7 Electrical Characteristics - Phase Jitter Parameters TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5%, See Test Loads for loading conditions PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes tjphPCIeG1 PCIe Gen 1 86 ps (p-p) 1,2,3,6 PCIe Gen 2 Lo Band 10kHz < f < 1.5MHz 3 ps (rms) 1,2,6 PCIe Gen 2 High Band 1.5MHz < f < Nyquist (50MHz) 3.1 ps (rms) 1,2,6 tjphPCIeG3 PCIe Gen 3 (PLL BW of 2-4MHz, CDR = 10MHz) 1 ps (rms) 1,2,4,5, 6 QPI & SMI (100MHz or 133MHz, 4.8Gb/s, 6.4Gb/s 12UI) 0.5 ps (rms) 1,5,6 QPI & SMI (100MHz, 8.0Gb/s, 12UI) 0.3 ps (rms) 1,5,6 QPI & SMI (100MHz, 9.6Gb/s, 12UI) 0.2 ps (rms) 1,5,6 1 Guaranteed by design and characterization, not 100% tested in production. 6 Applies to all differential outputs 3 Sample size of at least 100K cycles. This figures extrapolates to 108ps pk-pk @ 1M cycles for a BER of 1-12. 4 Subject to final radification by PCI SIG. tjphQPI_SMI 5 Calculated from Intel-supplied Clock Jitter Tool v 1.6.3 Phase Jitter, QPI/SMI 2 See http://www.pcisig.com for complete specs tjphPCIeG2 Phase Jitter, PCI Express Electrical Characteristics - REF-14.318/25 MHz TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5%; See Test Loads for Loads for loading conditions. PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes Long Accuracy ppm see Tperiod min-max values ppm 1,2 Clock period Tperiod 14.318MHz output nominal 69.8413 ns 1,2 Clock period Tperiod 25.000MHz output nominal 40 ns 1,2 Output High Voltage VOH IOH = -1 mA 2.4 V 1 Output Low Voltage VOL IOL = 1 mA 0.4 V 1 Output High Current IOH VOH @MIN = 1.0 V, VOH@MAX = 3.135 V -29 -23 mA 1 Output Low Current IOL VOL @MIN = 1.95 V, VOL @MAX = 0.4 V 29 27 mA 1 Rise/Fall Time trf1 VOL = 0.4 V, VOH = 2.4 V 0.5 2 ns 1 Duty Cycle dt1 VT = 1.5 V 45 55 % 1 Jitter tjcyc-cyc VT = 1.5 V 100 250 ps 1 1Guaranteed by design and characterization, not 100% tested in production. 2 All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is trimmed to 14.31818 or 25.00 MHz 0 |
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