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9DB106BFLFT Datasheet(PDF) 4 Page - Integrated Device Technology |
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9DB106BFLFT Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 14 page IDT® Six Output Differential Buffer for PCIe Gen 2 9DB106 REV K 04/20/11 9DB106 Six Output Differential Buffer for PCIe Gen 2 4 Electrical Characteristics - Absolute Maximum Ratings PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES 3.3V Core Supply Voltage VDDA 4.6 V 1,2 3.3V Logic Supply Voltage VDD 4.6 V 1,2 Input Low Voltage VIL GND-0.5 V 1 Input High Voltage VIH Except for SMBus interface VDD+0.5V V 1 Input High Voltage VIHSMB SMBus clock and data pins 5.5V V 1 Storage Temperature Ts -65 150 °C 1 Junction Temperature Tj 125 °C 1 Input ESD protection ESD prot Human Body Model 2000 V 1 1Guaranteed by design and characterization, not 100% tested in production. 2 Operation under these conditions is neither implied nor guaranteed. Electrical Characteristics - Input/Supply/Common Output Parameters TA = TCOM or TIND; Supply Voltage VDD = 3.3 V +/-5% PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes TCOM Commmercial range 0 70 °C 1 TIND Industrial range -40 85 °C 1 Input High Voltage VIH 3.3 V +/-5% 2 VDD + 0.3 V 1,2 Input Low Voltage VIL 3.3 V +/-5% VSS - 0.3 0.8 V 1,2 Input High Current IIH VIN = VDD -5 5 uA 1,2 IIL1 VIN = 0 V; Inputs with no pull- up resistors -5 uA 1,2 IIL2 VIN = 0 V; Inputs with pull-up resistors -200 uA 1,2 Full Active, CL = Full load; 130 150 mA 1 all differential pairs tri-stated 30 40 mA 1 Input Frequency Fi VDD = 3.3 V 80 100 105 MHz Pin Inductance Lpin 7 nH 1 CIN Logic Inputs 5 pF 1 COUT Output pin capacitance 4.5 pF 1 Clk Stabilization TSTAB From VDD reaching 3.1V and input clock stable 1.8 ms 1 Input Spread Spectrum Modulation Frequency Triangular Modulation 30 33 kHz 1 SMBus Voltage VDD 2.7 5.5 V 1 Low-level Output Voltage VOL @ IPULLUP 0.4 V 1 Current sinking at VOL = 0.4 V IPULLUP 4 mA 1 SCLK/SDATA Clock/Data Rise Time TRI2C (Max VIL - 0.15) to (Min VIH + 0.15) 1000 ns 1 SCLK/SDATA Clock/Data Fall Time TFI2C (Min VIH + 0.15) to (Max VIL - 0.15) 300 ns 1 1Guaranteed by design and characterization, not 100% tested in production. 2Except differential input clock Ambient Operating Temperature Input Capacitance IDD3.3OP Operating Supply Current Input Low Current |
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