SN65HVD255

SN65HVD256

www.ti.com

SLLSEA2

– DECEMBER 2011

THERMAL CHARACTERISTICS

13.0

TEST CONDITIONS

TYP

UNIT

13.1

Junction-to-air thermal resistance

107.5

13.2

48.9

13.3

56.7

°C/W

13.4

12.1

13.5

48.2

0 V, Input to TXD at 250 kHz, 25% duty cycle

13.6

115

operating conditions at 500kbps with 25%

transmission (dominant) rate.

Average power dissipation

mW

S at 0 V, Input to TXD at 500 kHz, 50% duty cycle

13.7

268

CAN operating conditions at 1mbps with 50%

transmission (dominant) rate and loaded network.

13.8

Thermal shutdown temperature

170

°C

13.9

Thermal shutdown hysteresis

5

°C

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

(2)

The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, High-K board, as

specified in JESD51-7, in an environment described in JESD51-2a.

(3)

he junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB

temperature, as described in JESD51-8.

(4)

The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific

JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.

(5)

The junction-to-top characterization parameter,

from the simulation data for obtaining

(6)

The junction-to-board characterization parameter,

from the simulation data for obtaining

Copyright

© 2011, Texas Instruments Incorporated

Submit Documentation Feedback

11

Product Folder Link(s): SN65HVD255 SN65HVD256