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IRS26302DJTRPBF Datasheet(PDF) 11 Page - International Rectifier |
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IRS26302DJTRPBF Datasheet(HTML) 11 Page - International Rectifier |
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11 / 53 page  IRS26302DJ www.irf.com © 2009 International Rectifier 11 Dynamic Electrical Characteristics VCC= VB = 15 V, VS = VSS = COM, TA = 25 oC, and C L = 1000 pF unless otherwise specified. Symbol Definition Min Typ Max Units Test Conditions tITRIPPFC/tITRI PBR ITRIP to PFCout/BRout shutdown propagation delay 400 620 850 VITRIP = -1 V ≥ 2 V to PFCOUT/BROUT = 15 V ≥ 0 V tPFCTRIPFLT /tBRTRIPFLT PFCTRIP/BRTRIP to fault time 700 1000 1500 VPFCTRIP/VBRTRIP = 1V ≥ -1.5 V V to FLT/En = 3.3 V ≥ 0 V tPFCTRIPOUT /tBRTRIPOUT PFCTRIP/BRTRIP to output shutdown propagation delay 400 600 950 VPFCTRIP/VBRTRIP = 1V ≥ -1.5 V to LOx/Hox = 15 V ≥ 0 V tPFCTRIPPFC /tBRTRIPPFC PFCTRIP/BRTRIP to PFC output shutdown propagation delay 320 500 850 VPFCTRIP/VBRTRIP = 1V ≥ -1.5 V to PFCOUT = 15 V ≥ 0 V tPFCTRIPBLK /tBRTRIPBLK PFCTRIP/BRTRIP blanking time 150 450 750 tGFTRIPFLT GFTRIP to fault time 1000 1400 1800 VGF = VDC ≥ VDC -1 V to FLT/En = 15 V ≥ 0 V tGFTRIPOUT GFTRIP to output shutdown propagation delay 700 1000 1300 VGF = VDC ≥ VDC -1 V to LOx/Hox = 15 V ≥ 0 V tGFTRIPPFC GFTRIP to PFC output shutdown propagation delay 600 900 1200 VGF = VDC ≥ VDC -1 V to PFCOUT = 15 V ≥ 0 V tGFTRIPBLK GFTRIP blanking time 150 300 550 tENOUT EN on to output propagation delay 300 400 500 VEN = 0 V ≥ 3.3 V, LINx/HINx = 3.3 V to LOx/Hox = 0 V ≥ 15 V tSDOUT EN off to output shutdown propagation delay 320 440 560 VEN = 3.3 V ≥ 0 V, LINx/HINx = 3.3 V to LOx/Hox = 15 V ≥ 0 V tENPFC/tENB R EN on to PFC/Brake output propagation delay 200 320 500 VEN = 0 V ≥ 3.3 V , PFCIN/BRIN = 3.3 V to PFCOUT/BROUT = 0 V ≥ 15 V tSDPFC/tSDB R EN off to output shutdown PFC/Brake propagation delay 200 360 500 VEN = 3.3 V ≥ 0 V, PFCIN/BRIN = 3.3 V to PFCOUT/BROUT =15 V ≥ 0 V tHANDSHAKE Input to Hand shake mode delay tDIAGIN Input to DIAG mode in delay tDIAGOUT Input to DIAG mode out delay 300 500 700 ns See fault diagnostic state diagram Note 1: A shoot-through prevention logic prevents LO1,2,3 and HO1,2,3 for each channel from turning on simultaneously. Note 2: UVCC is not latched, when VCC > UVCC, FAULT return to high impedance. Note 3: When ITRIP <VITRIP, FAULT returns to high-impedance after RCIN pin becomes greater than 8 V (@ VCC = 15 V) |
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