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ISL54233IRTZ-T Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL54233IRTZ-T Datasheet(HTML) 6 Page - Intersil Corporation |
6 / 18 page ISL54233 6 FN7918.0 December 21, 2011 Test Circuits and Waveforms Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 3A. ADDRESS tTRANS MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 3B. ADDRESS tTRANS TEST CIRCUIT FIGURE 3. SWITCHING TIMES FIGURE 4A. MEASUREMENT POINTS Repeat test for all switches. CL includes fixture and stray capacitance. FIGURE 4B. TEST CIRCUIT FIGURE 4. BREAK-BEFORE-MAKE TIME FIGURE 5. rON TEST CIRCUIT FIGURE 6. CAPACITANCE TEST CIRCUIT 50% tr < 20ns tf < 20ns tOFF 90% VC0,C1 0V VINPUT VC0,C1 tON LOGIC INPUT SWITCH INPUT SWITCH OUTPUT 90% VOUT V OUT V (INPUT) R L R L r ON + ------------------------ = SWITCH INPUT LOGIC VOUT RL CL COMx C0, C1 50 Ω 10pF GND VDD C VINPUT INPUT 90% VC0 VC1 tD LOGIC INPUT SWITCH OUTPUT 0V VOUT LOGIC C0, C1 COMx RL CL VOUT 10pF 50 Ω 2D- OR 2D+ 1D- OR 1D+ VDD GND VINPUT C INPUT 3D- OR 3D+ VDD C 0V xD- OR xD+ COMx C0 GND VD- OR VD+ V1 rON = V1/17mA 17mA Repeat test for all switches. C1 VDD VDD C GND xD- OR xD+ COMx VCx IMPEDANCE ANALYZER VCxL OR Repeat test for all switches. CTRL VCxH |
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