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ISO3088 Datasheet(PDF) 9 Page - Texas Instruments |
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ISO3088 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 20 page ISO3080, ISO3086 ISO3082, ISO3088 www.ti.com SLOS581D – MAY 2008 – REVISED JANUARY 2011 Table 1. Driver Function Table(1) ENABLE INPUT INPUT OUTPUTS(1) (D) VCC1 VCC2 (DE) Y / A Z / B PU PU H H H L PU PU L H L H PU PU X L hi-Z hi-Z PU PU X OPEN hi-Z hi-Z PU PU OPEN H H L PD PU X X hi-Z hi-Z PU PD X X hi-Z hi-Z PD PD X X hi-Z hi-Z (1) Driver output pins are Y & Z for full-duplex devices and A & B for half-duplex devices. Table 2. Receiver Function Table(1) DIFFERENTIAL INPUT ENABLE OUTPUT VCC1 VCC2 VID = (VA – VB) (RE) (R) PU PU –0.01 V ≤ VID L H PU PU –0.2 V < VID < –0.01 V L ? PU PU VID ≤ –0.2 V L L PU PU X H hi-Z PU PU X OPEN hi-Z PU PU Open circuit L H PU PU Short Circuit L H PU PU Idle (terminated) bus L H PD PU X X hi-Z PU PD X L H (1) PU = Powered Up; PD = Powered Down; H = Logic High; L= Logic Low; X = Irrelevant, hi-Z = High Impedance (off), ? = Indeterminate PACKAGE CHARACTERISTICS over recommended operating conditions (unless otherwise noted) PARAMETER(1) TEST CONDITIONS MIN TYP MAX UNIT Shortest terminal to terminal distance through L(I01) Minimum air gap (Clearance) 8.34 mm air Shortest terminal to terminal distance across L(I02) Minimum external tracking (Creepage) 8.1 mm the package surface Tracking resistance (Comparative Tracking CTI DIN IEC 60112 / VDE 0303 Part 1 ≥175 V Index) Minimum Internal Gap (Internal Clearance) Distance through the insulation 0.008 mm Input to output, VIO = 500 V, all pins on each RIO Isolation resistance side of the barrier tied together creating a >1012 Ω two-terminal device CIO Barrier capacitance Input to output VI = 0.4 sin (4E6pt) 2 pF CI Input capacitance to ground VI = 0.4 sin (4E6pt) 2 pF (1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed circuit board do not reduce this distance. Creepage and clearance on a printed circuit board become equal according to the measurement techniques shown in the Isolation Glossary. Techniques such as inserting grooves and/or ribs on a printed circuit board are used to help increase these specifications. Copyright © 2008–2011, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): ISO3080, ISO3086 ISO3082, ISO3088 |
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