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Document Number: 70190

S11-0975-Rev. G, 16-May-11

Vishay Siliconix

Si9130

This document is subject to change without notice.

3.3 V and 5 V Switching Controllers

Each PWM controller on the Si9130 is identical with the

exception of the preset output voltages. The controllers only

share three functional blocks (see Figure 3): the oscillator,

The 3.3 V and 5 V controllers are independently enabled with

summing type, without the typical integrating error amplifier

along with the phase shift which is a side effect of this type of

topology. Feedback compensation is not needed, as long as

the output capacitance and its ESR requirements are met,

according to the

Design Considerations section of this data

sheet.

The main PWM comparator is an open loop device which is

comprised of three comparators summing four signals: the

feedback voltage error signal, current sense signal, slope-

compensation ramp and voltage reference as shown in

Figure 3. This method of control comes closer to the ideal of

maintaining the output voltage on a cycle-by-cycle basis.

When the load demands high current levels, the controller is

in full PWM mode. Every cycle from the oscillator asserts the

output latch and drives the gate of the high-side MOSFET for

a period determined by the duty cycle (approximately

The high-side switch turns off, setting the synchronous

rectifier latch and 60 ns later, the rectifier MOSFET turns on.

The low-side switch stays on until the start of the next clock

Figure 3. Si9130 Controller Block Diagram

60 kHz

LPF

CS_

OSC

1X

R

S

Q

R

S

Q

Level

Shift

Level

Shift

Shoot-

Through

Control

FB_

BST_

DH_

LX_

DL_

PGND

Current

Limit

0 mV to

100 mV

Synchronous

Rectifier Control

1R

30R

4 µA

3.3 V

Minimum Current

(Pulse-Skipping Mode)

25 mV

REF,

3.3 V

(or Internal

5 V Reference)

SS_

ON_

Summing

Comparator

Slope

Comp