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SI9122ADLP-T1-E3 Datasheet(PDF) 6 Page - Vishay Siliconix |
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SI9122ADLP-T1-E3 Datasheet(HTML) 6 Page - Vishay Siliconix |
6 / 20 page www.vishay.com 6 Document Number: 73492 S-80038-Rev. D, 14-Jan-08 Vishay Siliconix Si9122A Notes: a. Refer to PROCESS OPTION FLOWCHART for additional information. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (- 40 °C to 85 °C). c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. FMIN when VCL_CONT at clamp level. Typical foldback frequency change + 20 %, - 30 % over temperature. e. Measured on SRL or SRH outputs. f. See figure 3 for Break-Before-Make time definition. g. VUVLO tracks VREG1 by a diode drop. h. Guaranteed by design and characterization, not tested in production. SPECIFICATIONSa Parameter Symbol Test Conditions Unless Otherwise Specified fNOM = 500 kHz, VIN = 75 V VINDET = 7.5 V; 10.5 V ≤ VCC ≤ 13.2 V Limits - 40 to 85 °C Unit Min.b Typ.c Max.b Synchronous Rectifier (SRH, SRL) Drivers Output High Voltage VOH Sourcing 10 mA VCC - 0.4 V Output Low Voltage VOL Sinking 10 mA 0.4 Break-Before-Make Timef tBBM1 TA = 25 °C, RBBM = 33 kΩ, See Figure 3 55 ns tBBM2 40 tBBM3 TA = 25 °C, RBBM = 33 kΩ, LX = 75 V 35 tBBM4 55 Peak Output Source ISOURCE VCC = 10.5 V - 100 mA Peak Output Sink ISINK 100 Rise Time tr CSRH = CSRL = 0.3 nF 35 ns Fall Time tf 35 Voltage Mode Error Amplifier td1DH Input to High-Side Switch Off < 200 ns td2DL Input to Low-Side Switch Off < 200 Current Mode Current Amplifier td3DH Input to High-Side Switch Off < 200 ns td4DL Input to Low-Side Switch Off < 200 |
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