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SI9102DN02 Datasheet(PDF) 3 Page - Vishay Siliconix |
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SI9102DN02 Datasheet(HTML) 3 Page - Vishay Siliconix |
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3 / 10 page  Document Number: 70001 S-70497-Rev. H, 19-Mar-07 www.vishay.com 3 Vishay Siliconix Si9102 Notes: a. Refer to PROCESS OPTION FLOWCHART for additional information. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. Temperature coefficient of rDS(on) is 0.75 % per °C, typical. g. CSTRAY Pin 8 = ≤ 5 pF. SPECIFICATIONSa Parameter Symbol Test Conditions Unless Otherwise Specified DISCHARGE = - VIN = 0 V VCC = 10 V, + VIN = 48 V RBIAS = 390 kΩ, ROSC = 330 kΩ Limits D Suffix - 40 to 85 °C Unit Tempb Mind Typc Maxd Error Amplifier Feedback Input Voltage VFB FB Tied to COMP OSC IN = - VIN (OSC Disabled) Room 3.96 4.00 4.04 V Input BIAS Current IFB OSC IN = - VIN, VFB = 4 V, OSC IN = - VIN (OSC Disabled) Room 25 500 nA Open Loop Voltage Gaine AVOL Room 60 80 dB Unity Gain Bandwidthe BW Room 0.7 1 MHz Dynamic Output Impedancee ZOUT Room 1000 2000 Ω Output Current IOUT Source (VFB = 3.4 V) Room - 2.0 - 1.4 mA Input OFFSET Voltage VOS OSC IN = - VIN (OSC Disabled) Room ± 15 ± 40 mV Output Current IOUT Sink (VFB = 4.5 V) Room 0.12 0.15 mA Power Supply Rejection PSRR 9.5 V ≤ V CC ≤ 13.5 V Room 50 70 dB Current Limit Threshold Voltage VSOURCE RL = 100 Ω from DRAIN to VCC VFB = 0 V Room 1.0 1.2 1.4 V Delay to Outpute td RL = 100 Ω from DRAIN to VCC VSOURCE = 1.5 V, See Figure 1 Room 100 200 ns Pre-Regulator/Start-Up Input Voltage + VIN IIN = 10 µA Room 120 V Input Leakage Current + IIN VCC ≥ 10 V Room 10 µA Pre-Regulator Start-Up Current ISTART Pulse Width ≤ 300 µs, V CC = 7 V Room 8 15 mA VCC Pre-Regulator Turn-Off Threshold Voltage VREG IPRE-REGULATOR = 10 µA Room 7.8 9.4 9.7 V Undervoltage Lockout VUVLO RL = 100 Ω from DRAIN to VCC See Detailed Description Room 7.0 8.8 9.2 VREG, - VUVLO VDELTA Room 0.3 0.6 Supply Supply Current ICC Room 0.45 0.6 1.0 mA Bias Current IBIAS Room 10 15 20 µA Logic SHUTDOWN Delaye tSD VSOURCE = - VIN, See Figure 2 Room 50 100 ns SHUTDOWN Pulse Widthe tSW See Figure 3 Room 50 RESET Pulse Widthe tRW Room 50 Latching Pulse Widthe SHUTDOWN and RESET Low tLW Room 25 Input Low Voltage VIL Room 2.0 V Input High Voltage VIH Room 8.0 Input Current Input Voltage High IIH VIN = 10 V Room 1 5 µA Input Current Input Voltage Low IIL VIN = 0 V Room - 35 - 25 MOSFET Switch Breakdown Voltage VBR(DSS) IDRAIN = 100 µA Full 200 220 V Drain-Source On Resistancef rDS(on) IDRAIN = 100 mA Room 7 Ω Drain Off Leakage Current IDSS VDRAIN = 100 V Room 5 10 µA Drain Capacitance CDS Room 35 pF |
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