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HI-8596PSTF Datasheet(PDF) 4 Page - Holt Integrated Circuits |
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HI-8596PSTF Datasheet(HTML) 4 Page - Holt Integrated Circuits |
4 / 12 page HI-8596 HOLT INTEGRATED CIRCUITS 4 FUNCTIONAL DESCRIPTION Figure 1 is a block diagram of the line driver. The HI-8596 requires only a single +3.3V power supply. An integrated inverting / non-inverting voltage doubler generates the rail voltages (±6.6V) which are then used to produce the ±5V ARINC-429 output levels. The internal dual polarity charge pump circuit requires four external capacitors, two for each polarity gener- ated by the doubler. CP+ and CP- connect the exter- nal charge transfer or “fly” capacitor, C FLY, to the positive portion of the doubler, resulting in twice V DD at the VDD2+ pin. An output “hold” capacitor, C OUT, is placed between V DD2+ and GND. COUT should be ten times the size of CFLY. The inverting or negative portion of the converter works in a similar fashion, with C FLY and COUT placed between CN+ / CN- and V DD2- / GND respectively. Currents for slope control are set by on-chip resistors. The TX0IN and TX1IN inputs receive logic signals from a control transmitter chip such as the HI-3584. TXAOUT and TXBOUT hold each side of the ARINC bus at Ground until one of the inputs becomes a One. If for example TX1IN goes high, a charging path is enabled to 5V on an “A” side internal capacitor while the “B” side is enabled to -5V. The charging current is selected by the SLP pin. If the SLP pin is high, the capacitor is nominally charged from 10% to 90% in 1.5μs. If SLP is low, the rise and fall times are 10μs. A unity gain buffer receives the internally generated slopes and differentially drives the ARINC line. Cur- rent is limited by the series output resistors at each pin. There are no fuses at the outputs of the HI-8596. The HI-8596 has 37.5 ohms in series with each TXOUT output and 5 ohms in series with each AMP output. The AMP outputs are for applications where external series resistance is required, typically for lightning protection devices. Holt Application Note AN-300 describes suit- able lightning protection schemes. Tri-stateable outputs allow multiple line drivers to be connected to the same ARINC 429 bus. Setting TX1IN and TX0IN both to a logic “1” puts the outputs in the high-impedance state. ABSOLUTE MAXIMUM RATINGS Supply Voltages V DD .......................................................... +5V Power Dissipation at 25 oC plastic SOIC ........... 1.0W, derate 10mW/ oC ceramic DIP ......... 0.5W, derate 7mW/ oC Solder Temperature ......................... 275 oC for 10sec Storage Temperature ....................... -65 oC to +150oC Note: HEAT SINK on QFN PACKAGE The HI-8596 driver is available in a small-footprint, thermally enhanced QFN (chip-scale) package. This package includes an electrically isolated metal heat sink located on the bottom surface of the device. This heat sink should be soldered down to the printed circuit board for optimum thermal dissipation. RECOMMENDED OPERATING CONDITIONS Supply Voltages V DD ................................... +3.0V to +3.6V Temperature Range Industrial Screening .............. -40 oC to +85oC Hi-Temp Screening .............. -55 oC to +125oC NOTE: Stresses above absolute maximum ratings or outside recom- mended operating conditions may cause permanent damage to the device. These are stress ratings only. Operation at the limits is not recommended. |
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