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DS2482-101 Datasheet(PDF) 10 Page - Maxim Integrated Products |
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DS2482-101 Datasheet(HTML) 10 Page - Maxim Integrated Products |
10 / 24 page Single-Channel 1-Wire Master with Sleep Mode 10 ______________________________________________________________________________________ Write Configuration Command Code D2h Command Parameter Configuration Byte Description Writes a new configuration byte. The new settings take effect immediately. Note: When writing to the Configuration Register, the new data is accepted only if the upper nibble (bits 7 to 4) is the one’s complement of the lower nibble (bits 3 to 0). When read, the upper nibble is always 0h. Typical Use Defining the features for subsequent 1-Wire communication. Restriction 1-Wire activity must have ended before the DS2482-101 can process this command. Error Response Command code and parameter are not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. Command Duration None. The Configuration Register is updated on the rising SCL edge of the configuration-byte acknowledge bit. 1-Wire Activity None Read Pointer Position Configuration Register (to verify write). Status Bits Affected RST set to 0. Configuration Bits Affected 1WS, SPU, APU updated. 1-Wire Reset Command Code B4h Command Parameter None Description Generates a 1-Wire reset/presence-detect cycle (Figure 4) at the 1-Wire line. The state of the 1-Wire line is sampled at tSI and tMSP and the result is reported to the host processor through the Status Register, bits PPD and SD. Typical Use To initiate or end any 1-Wire communication sequence. Restriction 1-Wire activity must have ended before the DS2482-101 can process this command. Strong pullup (see SPU bit) should not be used in conjunction with the 1-Wire Reset command. If SPU is enabled, the PPD bit may not be valid and may cause a violation of the device’s absolute maximum rating. Error Response Command code is not acknowledged if 1WB = 1 at the time the command code is received and the command is ignored. Command Duration tRSTL + tRSTH + maximum 262.5ns, counted from the falling SCL edge of the command code acknowledge bit. 1-Wire Activity Begins maximum 262.5ns after the falling SCL edge of the command code acknowledge bit. Read Pointer Position Status Register (for busy polling). Status Bits Affected 1WB (set to 1 for tRSTL + tRSTH), PPD is updated at tRSTL + tMSP, SD is updated at tRSTL + tSI. Configuration Bits Affected 1WS, APU, SPU apply. |
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