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LV8081GQ Datasheet(PDF) 4 Page - Sanyo Semicon Device |
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LV8081GQ Datasheet(HTML) 4 Page - Sanyo Semicon Device |
4 / 9 page LV8081GQ Truth Table Input Output IN1 IN2 IN3 IN4 CONT OUT1 OUT2 OUT3 OUT4 COMP & PIPR Mode Low Low Low Low Low Off Off Off Off OFF Standby mode Low High Low High Channel 1, reverse High Low High Low Channel 1, forward High High - - Low Low Off Off Channel 1, brake mode Low High Low High Channel 2, reverse High Low High Low Channel 2, forward - - High High High Off Off Low Low ON Channel 2, brake mode Note : The "-" input unstable state. When off, a high-impedance state. • The ENA goes to the standby state with a low-level input, and to the operating state with a high-level input. • The control input switches the forward/reverse mode. • The comparator and PIPR can independently control the terminal CONT. It is irrelevant to the state of IN4 from IN1. Pin Description Pin No. Pin Name Description Equivalent Circuit 1 2 3 4 5 16 OUT1 OUT2 OUT3 OUT4 RFG2 RFG1 1-4 : Output pins H-bridge type output pins Pins 1 and 2 are paired and pins 3 and 4 are paired. 5, 16 : Current sensing resistor connection pins Connect the current sensing resistor between these pins and ground to detect the output currents for constant current control. Pin 16 corresponds to the output from pins 1 and 2 and pin 5 to the output from pins 1 and 2. - + 10k Ω 0.1V VCC 1 5 2 6 7 8 9 10 IN3 IN4 IN1 IN2 CONT Logic input pins VCC GND 6 11 GND Ground Continued on next page. No.A1550-4/9 |
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