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DG9408DN-T1-E4 Datasheet(PDF) 1 Page - Vishay Siliconix |
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DG9408DN-T1-E4 Datasheet(HTML) 1 Page - Vishay Siliconix |
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1 / 16 page  Vishay Siliconix DG9408, DG9409 Document Number: 71870 S11-1229-Rev. C, 20-Jun-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Precision 8-Ch/Dual 4-Ch Low Voltage Analog Multiplexers DESCRIPTION The DG9408, DG9409 uses BiCMOS wafer fabrication technology that allows the DG9408, DG9409 to operate on single and dual supplies. Single supply voltage ranges from 3 V to 12 V while dual supply operation is recommended with ± 3 V to ± 6 V. The DG9408 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (A0, A1, A2). The DG9409 is a dual 4-channel differential analog multiplexer designed to connect one of four differential inputs to a common dual output as determined by its 2-bit binary address (A0, A1). Break-before-make switching action to protect against momentary crosstalk between adjacent channels. As a committed partner to the community and the environment, Vishay Siliconix manufactures this product with lead (Pb)-free device terminations. The DG9408, DG9409 are offered in a QFN package that has a nickel-palladium- gold device terminations and is represented by the lead (Pb)-free “-E4” suffix. The nickel-palladium-gold device terminations meet all the JEDEC standards for reflow and MSL ratings. FEATURES • Halogen-free According to IEC 61249-2-21 Definition • 2.7 V to 12 V single supply or ± 3 V to ± 6 V dual supply operation • Low on-resistance - RON: 3.9 typ. • Fast switching: tON - 42 ns, tOFF - 24 ns • Break-before-make guaranteed • Low leakage • TTL, CMOS, LV logic (3 V) compatible • 2000 V ESD protection (HBM) • Compliant to RoHS Directive 2002/95/EC BENEFITS • High accuracy • Single and dual power rail capacity • Wide operating voltage range • Simple logic interface APPLICATIONS • Data acquisition systems • Battery operated equipment • Portable test equipment • Sample and hold circuits • Communication systems • SDSL, DSLAM • Audio and video signal routing FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION 49 GND S2a S4b S3b S3a EN S2b S1a 1 2 3 12 11 10 567 8 16 15 14 13 A0 V+ A1 S4a S1b Db V- Da Decoder/Driver Top View DG9409 QFN16 GND S6 S4 S3 S7 EN S2 S5 1 2 3 12 11 10 49 56 7 8 16 15 14 13 A0 V+ A1 S8 S1 A2 V- D Decoder/Driver Top View DG9408 QFN16 |
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