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DG411L Datasheet(PDF) 9 Page - Vishay Siliconix |
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DG411L Datasheet(HTML) 9 Page - Vishay Siliconix |
9 / 14 page Document Number: 71397 S11-0179-Rev. F, 07-Feb-11 www.vishay.com 9 Vishay Siliconix DG411L, DG412L, DG413L SCHEMATIC DIAGRAM (Typical Channel) TEST CIRCUITS Figure 1. Level Shift/ Drive VIN VL S V+ GND V- D V- V+ Figure 2. Switching Time 0 V Logic Input Switch Input* Switch Output 3 V 50% 0 V Switch Input* VS tr < 20 ns tf < 20 ns 90 % - VS tON tON VO 90 % VO Note: Logic input waveform is inverted for switches that have the opposite logic sense control CL (includes fixture and stray capacitance) V+ IN RL RL + rDS(on) VO = VS S D V- VO GND VL CL 35 pF V- RL 300 Ω VL V+ VS Figure 3. Break-Before-Make (DG413L) 0 V Logic Input Switch Switch Output 3 V 50 % 0 V Output 0 V 90 % VO2 VO1 90 % VS1 VS2 tD tD VO2 CL (includes fixture and stray capacitance) V+ S2 V- S1 VL VS2 IN2 D2 VS1 RL2 300 Ω D1 VO1 CL2 35 pF GND RL1 300 Ω CL1 35 pF IN1 V- |
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