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LNK564P Datasheet(PDF) 6 Page - Power Integrations, Inc.

Part # LNK564P
Description  Energy Effi cient Off-Line Switcher IC for Linear Transformer Replacement
Download  16 Pages
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Manufacturer  POWERINT [Power Integrations, Inc.]
Direct Link  http://www.powerint.com
Logo POWERINT - Power Integrations, Inc.

LNK564P Datasheet(HTML) 6 Page - Power Integrations, Inc.

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Rev. H 11/08
6
LNK562-564
LinkSwitch-LP Layout Considerations
Layout
See Figure 6 for a recommended circuit board layout for
LinkSwitch-LP (P & G package).
Single Point Grounding
Use a single point ground connection from the input filter
capacitor to the area of copper connected to the SOURCE pins.
Bypass Capacitor (C
BP)
The BYPASS pin capacitor should be located as near as possible
to the BYPASS and SOURCE pins.
Primary Loop Area
The area of the primary loop that connects the input filter
capacitor, transformer primary and LinkSwitch-LP together
should be kept as small as possible.
Primary Clamp Circuit
An external clamp may be used to limit peak voltage on the
DRAIN pin at turn off. This can be achieved by using an RCD
clamp or a Zener (~200 V) and diode clamp across the primary
winding. In all cases, to minimize EMI, care should be taken
to minimize the circuit path from the clamp components to the
transformer and LinkSwitch-LP.
Thermal Considerations
The copper area underneath the LinkSwitch-LP acts not only as
a single point ground, but also as a heatsink. As it is connected
to the quiet source node, this area should be maximized for
good heat sinking of LinkSwitch-LP. The same applies to the
cathode of the output diode.
Y-Capacitor
The placement of the Y-type cap should be directly from the
primary input filter capacitor positive terminal to the common/
return terminal of the transformer secondary. Such a placement
will route high magnitude common-mode surge currents away
from the LinkSwitch-LP device. Note: If an input pi (C, L, C)
EMI filter is used, then the inductor in the filter should be placed
between the negative terminals on the input filter capacitors.
Figure 6. Recommended Circuit Board Layout for LinkSwitch-LP using P Package (Assumes a HVDC Input Stage).
+
HV DC
INPUT
-
+
Input Filter
Capacitor
CBP
-
DC
OUT
Output Filter
Capacitor
PI-4157-101305
Maximize hatched copper
areas (
) for optimum
heatsinking
TOP VIEW
Tr a n s f o r m e r
D
S
S
FB
BP
S
S


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