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CBC050 Datasheet(PDF) 4 Page - Cymbet Corporation
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CBC050 Datasheet(HTML) 4 Page - Cymbet Corporation
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EnerChip™ CBC050 Solid State Energy Storage
©2009-2010 Cymbet Corporation • Tel: +1-763-633-1780 • www.cymbet.com
DS-72-01 Rev B
Page 4 of 4
Figure 1: Recommended PCB layout for the CBC050 package. Do not route signal traces under the EnerChip
as they could become shorted to the die pad (as shown by the dotted lines) on the package underside.
Printed Circuit Board (PCB) Layout Guidelines and Recommendations
Electrical resistance of solder flux residue on PCBs can be low enough to partially or fully discharge the backup
energy cell and in some cases can be comparable to the load typically imposed on the cell when delivering
power to an integrated circuit in low power mode. Therefore, solder flux must be thoroughly washed from the
board following soldering. The PCB layout can make this problem worse if the cell’s positive and negative
terminals are routed near each other and under the package, where it is difficult to wash the flux residue away.
To avoid this situation, make sure positive and negative traces are routed outside of the package footprint to
ensure that flux residue will not cause a discharge path between the positive and negative pads. Similarly, a
leakage current path can exist from the package lead solder pads to the exposed die pad on the underside of
the package as well as any solder pad on the PCB that would be connected to that exposed die pad during the
reflow solder process. Therefore, it is strongly recommended that the PCB layout not include a solder pad in the
region where the exposed die pad of the package will land. It is sufficient to place PCB solder pads only where
the package leads will be. That region of the PCB where the exposed die pad will land must not have any solder
pads, traces, or vias.
When placing a silk screen on the PCB around the perimeter of the package, place the silk screen outside of
the package and all metal pads. Failure to observe this precaution can result in package cracking during solder
reflow due to the silk screen material interfering with the solder solidification process during cooling.
A recommended CBC050 PCB layout is shown in Figure 1 below. Notice that there should not be a center pad
on the PCB to mate with the exposed die pad on the CBC050 package. Again, this is to reduce the possible
number and severity of leakage paths between the EnerChip terminals.
Dimensions in inches [mm]
Cymbet, the Cymbet Logo and EnerChip are trademarks of Cymbet Corporation. All Rights Reserved
Disclaimer of Warranties; As Is
The information provided in this data sheet is provided “As Is” and Cymbet Corporation disclaims all representations or warranties of any
kind, express or implied, relating to this data sheet and the Cymbet EnerChip product described herein, including without limitation, the
implied warranties of merchantability, fitness for a particular purpose, non-infringement, title, or any warranties arising out of course of
dealing, course of performance, or usage of trade. Cymbet EnerChip products are not approved for use in life critical applications. Users
shall confirm suitability of the Cymbet EnerChip product in any products or applications in which the Cymbet EnerChip product is adopted
for use and are solely responsible for all legal, regulatory, and safety-related requirements concerning their products and applications and
any use of the Cymbet EnerChip product described herein in any such product or applications.
Soldering, Rework, and Electrical Test
Refer to the Cymbet User Manual for soldering, rework, and replacement of the EnerChip on printed circuit
boards, and for instructions on in-circuit electrical testing of the EnerChip.
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