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MC74HCT240 Datasheet(PDF) 1 Page - Motorola, Inc |
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MC74HCT240 Datasheet(HTML) 1 Page - Motorola, Inc |
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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 1 REV 7 © Motorola, Inc. 1997 2/97 Octal 3-State Inverting Buffer/ Line Driver/Line Receiver with LSTTL-Compatible Inputs High–Performance Silicon–Gate CMOS The MC74HCT240A is identical in pinout to the LS240. This device may be used as a level converter for interfacing TTL or NMOS outputs to High–Speed CMOS inputs. The HCT240A is an octal inverting buffer line driver line receiver designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. The device has inverting outputs and two active–low output enables. The HCT240A is the inverting version of the HCT244. See also HCT241. • Output Drive Capability: 15 LSTTL Loads • TTL NMOS–Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1 µA • In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 110 FETs or 27.5 Equivalent Gates LOGIC DIAGRAM DATA INPUTS A1 A2 A3 A4 B1 B2 B3 B4 17 15 13 11 8 6 4 218 16 14 12 9 7 5 3 YB4 YB3 YB2 YB1 YA4 YA3 YA2 YA1 INVERTING OUTPUTS PIN 20 = VCC PIN 10 = GND OUTPUT ENABLES ENABLE A ENABLE B 1 19 MC74HCT240A PIN ASSIGNMENT A3 A2 YB4 A1 ENABLE A GND YB1 A4 YB2 YB3 5 4 3 2 1 10 9 8 7 6 14 15 16 17 18 19 20 11 12 13 YA2 B4 YA1 ENABLE B VCC B1 YA4 B2 YA3 B3 FUNCTION TABLE Inputs Outputs Enable A, Enable B A, B YA, YB LL H LH L HX Z Z = High Impedance X = Don’t Care DW SUFFIX SOIC PACKAGE CASE 751D–04 N SUFFIX PLASTIC PACKAGE CASE 738–03 ORDERING INFORMATION MC74HCTXXXAN MC74HCTXXXADW MC74HCTXXXASD MC74HCTXXXADT Plastic SOIC SSOP TSSOP DT SUFFIX TSSOP PACKAGE CASE 948E–02 1 20 SD SUFFIX SSOP PACKAGE CASE 940C–03 1 20 1 20 1 20 |
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