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STM32F407IG Datasheet(PDF) 48 Page - STMicroelectronics |
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STM32F407IG Datasheet(HTML) 48 Page - STMicroelectronics |
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48 / 154 page  Pinouts and pin description STM32F405xx, STM32F407xx 48/154 Doc ID 022152 Rev 1 - - 132 B7 160 PG15 FT PG15 USART6_CTS / DCMI_D13 55 89 133 A10 161 PB3 FT JTDO/ TRACESWO JTDO/ TRACESWO/ SPI3_SCK / I2S3_CK / TIM2_CH2 / SPI1_SCK 56 90 134 A9 162 PB4 FT NJTRST NJTRST/ SPI3_MISO / TIM3_CH1 / SPI1_MISO / I2S3ext_SD 57 91 135 A6 163 PB5 FT PB5 I2C1_SMBA/ CAN2_RX / OTG_HS_ULPI_D7 / ETH_PPS_OUT/TIM3_CH2 / SPI1_MOSI/ SPI3_MOSI / DCMI_D10 / I2S3_SD 58 92 136 B6 164 PB6 FT PB6 I2C1_SCL/ TIM4_CH1 / CAN2_TX /OTG_FS_INTN / DCMI_D5/USART1_TX 59 93 137 B5 165 PB7 FT PB7 I2C1_SDA / FSMC_NL / DCMI_VSYNC / USART1_RX/ TIM4_CH2 60 94 138 D6 166 BOOT0 BOOT0 VPP 61 95 139 A5 167 PB8 FT PB8 TIM4_CH3/SDIO_D4/ TIM10_CH1 / DCMI_D6 / OTG_FS_SCL/ ETH_MII_TXD3 / I2C1_SCL/ CAN1_RX 62 96 140 B4 168 PB9 FT PB9 SPI2_NSS/ I2S2_WS / TIM4_CH4/ TIM11_CH1/ OTG_FS_SDA/ SDIO_D5 / DCMI_D7 / I2C1_SDA / CAN1_TX - 97 141 A4 169 PE0 FT PE0 TIM4_ETR / FSMC_NBL0 / DCMI_D2 - 98 142 A3 170 PE1 FT PE1 FSMC_NBL1 / DCMI_D3 63 - - D5 - VSS_3 VSS_3 - 99 143 C6 171 PDR_ON PDR_ON 64 100 144 C5 172 VDD VDD - - - D4 173 PI4 FT PI4 TIM8_BKIN / DCMI_D5 - - - C4 174 PI5 FT PI5 TIM8_CH1 / DCMI_VSYNC - - - C3 175 PI6 FT PI6 TIM8_CH2 / DCMI_D6 - - - C2 176 PI7 FT PI7 TIM8_CH3 / DCMI_D7 1. Function availability depends on the chosen device. 2. The functions in bold are remapped through peripheral registers. 3. PC13, PC14, PC15 and PI8 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 and PI8 in output mode is limited: the speed should not exceed 2 MHz with a maximum load of 30 pF and these I/Os must not be used as a current source (e.g. to drive an LED). 4. Main function after the first backup domain power-up. Later on, it depends on the contents of the RTC registers even after reset (because these registers are not reset by the main reset). For details on how to manage these I/Os, refer to the RTC register description sections in the STM32F46x reference manual, available from the STMicroelectronics website: www.st.com. 5. FT = 5 V tolerant except when in analog mode or oscillator mode (for PC14, PC15, PH0 and PH1). 6. If the device is delivered in an UFBGA176 and the BYPASS_REG pin is set to VDD (Regulator off/internal reset ON mode), then PA0 is used as an internal Reset (active low). Table 5. STM32F40x pin and ball definitions (continued) Pins Pin name Function(1) after reset Alternate functions(2) |
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