DS2251T

6 of 22

PIN

DESCRIPTION

71

VRST

DS2251T will drive this pin to a logic 0. Because the micro is lithium backed, this signal is

low externally. This allows multiple parts to synchronize their power-down resets.

65

PF

. This output goes to a logic 0 to indicate that the micro has switched to lithium backup.

55

INTB

input.

68

INTP

connected to a micro interrupt input.

69

INTA

input.

70

SQW. Square-wave output from the DS1283 real-time clock. Can be programmed to output

a 1024Hz square wave.

INSTRUCTION SET

The DS2251T executes an instruction set that is object code compatible with the industry standard 8051

microcontroller. As a result, software development packages such as assemblers and compilers that have

been written for the 8051 are compatible with the DS2251T.

A complete description of the instruction set and operation are provided in the Secure Microcontroller

User’s Guide.

MEMORY ORGANIZATION

Figure 2 illustrates the memory map accessed by the DS2251T. The entire 64k of program and 64k of

data are available to the byte-wide bus. This preserves the I/O ports for application use. The user controls

the portion of memory that is actually mapped to the byte-wide bus by selecting the Program Range and

Data Range. Any area not mapped into the NV RAM is reached via the Expanded bus on Ports 0 and 2.

An alternate configuration allows dynamic Partitioning of a 64k space as shown in Figure 3. Selecting

access as shown in Figure 4. These selections are made using Special Function Registers. The memory

map and its controls are covered in detail in the Secure Microcontroller User’s Guide.