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PSMN7R5-25YLC Datasheet(PDF) 9 Page - NXP Semiconductors |
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PSMN7R5-25YLC Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 15 page PSMN7R5-25YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 1 — 12 July 2011 9 of 15 NXP Semiconductors PSMN7R5-25YLC N-channel 25 V 7.4 m Ω logic level MOSFET in LFPAK using NextPower technology Fig 12. Drain-source on-state resistance as a function of drain current; typical values Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 14. Gate charge waveform definitions Fig 15. Gate-source voltage as a function of gate charge; typical values 003aag175 0 5 10 15 20 25 020 40 60 80 I D(A) R DSon (m Ω) 2.8 4.5 3.0 V GS(V) = 3.5 10 003a a g176 0 0.5 1 1.5 2 -60 0 60 120 180 Tj ( C) a VGS = 10V 4.5V 003aaa508 VGS VGS(th) QGS1 QGS2 QGD VDS QG(tot) ID QGS VGS(pl) 003a a g177 0 2 4 6 8 10 04 8 12 16 20 QG (nC) VGS (V) VDS = 5V 20V 12V |
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