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LPC2420FBD208 Datasheet(PDF) 5 Page - NXP Semiconductors |
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LPC2420FBD208 Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 86 page  LPC2420_60 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 6.1 — 22 September 2011 5 of 86 NXP Semiconductors LPC2420/2460 Flashless 16-bit/32-bit microcontroller 5. Block diagram (1) LPC2460 only. Fig 1. LPC2420/2460 block diagram power domain 2 LPC2420/2460 A[23:0] D[31:0] EXTERNAL MEMORY CONTROLLER ALARM 002aad313 PWM0, PWM1 ARM7TDMI-S PLL EINT3 to EINT0 P3, P4 P0, P1, P2, LEGACY GPI/O 64 PINS TOTAL P0, P1 SCK, SCK0 MOSI, MOSI0 SSEL, SSEL0 SCK1 MOSI1 MISO1 SSEL1 SCL0, SCL1, SCL2 I2SRX_CLK I2STX_CLK I2SRX_WS I2STX_WS 8 × AD0 RTCX1 RTCX2 MCICLK, MCIPWR RXD0, RXD2, RXD3 TXD1 RXD1 RD1, RD2 TD1, TD2 CAN1(1), CAN2(1) port1 XTAL1 TCK TDO EXTIN0 XTAL2 RESET TRST TDI TMS HIGH-SPEED GPI/O 160 PINS TOTAL port2 64 kB SRAM INTERNAL SRAM CONTROLLER TEST/DEBUG INTERFACE trace signals AHB BRIDGE AHB BRIDGE ETHERNET MAC WITH DMA(1) 16 kB SRAM (1) MASTER PORT AHB TO AHB BRIDGE SLAVE PORT system clock SYSTEM FUNCTIONS INTERNAL RC OSCILLATOR VDDA VDD(3V3) VDD(DCDC)(3V3) VREF VSSA, VSSCORE, VSSIO VIC 16 kB SRAM USB DEVICE/ HOST/OTG WITH 4 kB RAM AND DMA GP DMA CONTROLLER I2S INTERFACE SPI, SSP0 INTERFACE I2SRX_SDA I2STX_SDA MISO, MISO0 SSP1 INTERFACE SD/MMC CARD INTERFACE MCICMD, MCIDAT[3:0] TXD0, TXD2, TXD3 UART0, UART2, UART3 UART1 DTR1, RTS1 DSR1, CTS1, DCD1, RI1 I2C0, I2C1, I2C2 SDA0, SDA1, SDA2 EXTERNAL INTERRUPTS CAPTURE/COMPARE TIMER0/TIMER1/ TIMER2/TIMER3 A/D CONVERTER D/A CONVERTER 2 kB BATTERY RAM RTC OSCILLATOR REAL- TIME CLOCK WATCHDOG TIMER SYSTEM CONTROL 2 × CAP0/CAP1/ CAP2/CAP3 4 × MAT2/MAT3, 2 × MAT0, 3 × MAT1 6 × PWM0/PWM1 1 × PCAP0, 2 × PCAP1 AOUT VBAT AHB TO APB BRIDGE MII/RMII VBUS DBGEN P0, P2 AHB2 AHB1 control lines |
Similar Part No. - LPC2420FBD208 |
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Similar Description - LPC2420FBD208 |
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