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LPC1343FHN33 Datasheet(PDF) 18 Page - NXP Semiconductors |
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LPC1343FHN33 Datasheet(HTML) 18 Page - NXP Semiconductors |
18 / 73 page LPC1311_13_42_43 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 4 — 20 June 2011 18 of 73 NXP Semiconductors LPC1311/13/42/43 32-bit ARM Cortex-M3 microcontroller 7.6 Nested Vectored Interrupt Controller (NVIC) The Nested Vectored Interrupt Controller (NVIC) is an integral part of the Cortex-M3. The tight coupling to the CPU allows for low interrupt latency and efficient processing of late arriving interrupts. Fig 6. LPC1311/13/42/43 memory map 0x5000 0000 0x5001 0000 0x5002 0000 0x5020 0000 AHB peripherals 16 - 127 reserved GPIO PIO1 4-7 0x5003 0000 0x5004 0000 GPIO PIO2 GPIO PIO3 8-11 12-15 GPIO PIO0 0-3 APB peripherals 0x4000 4000 0x4000 8000 0x4000 C000 0x4001 0000 0x4001 8000 0x4002 0000 0x4002 8000 0x4003 8000 0x4003 C000 0x4004 0000 0x4004 4000 0x4004 8000 0x4004 C000 0x4008 0000 0x4002 4000 0x4001 C000 0x4001 4000 0x4000 0000 WDT/WWDT 32-bit counter/timer 0 32-bit counter/timer 1 ADC UART PMU I2C-bus 10 - 13 reserved reserved 19 - 21 reserved 23 - 31 reserved 0 1 2 3 4 5 6 7 8 9 16 15 14 17 18 reserved reserved 0x0000 0000 0 GB 0.5 GB 4 GB 1 GB 0x0000 4000 0x0000 2000 0x1000 2000 0x1000 1000 0x1FFF 0000 0x1FFF 4000 0x2000 0000 0x4000 0000 0x4008 0000 0x5000 0000 0x5020 0000 0xFFFF FFFF reserved reserved reserved APB peripherals AHB peripherals 8 kB SRAM (LPC1313/1343) 0x1000 0000 4 kB SRAM (LPC1311/1342) LPC1311/13/42/43 16 kB on-chip flash (LPC1342) 8 kB on-chip flash (LPC1311) 0x0000 8000 32 kB on-chip flash (LPC1313/43) 16 kB boot ROM 0x0000 0000 0x0000 0400 active interrupt vectors + 256 words I-code/D-code memory space 002aae723 reserved reserved SSP0 0x4005 8000 0x4005 C000 22 SSP1 (LPC1313FBD48/01) 16-bit counter/timer 1 16-bit counter/timer 0 USB (LPC1342/43 only) IOCONFIG system control flash controller 0xE000 0000 0xE010 0000 private peripheral bus |
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