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LPC2146 Datasheet(PDF) 2 Page - NXP Semiconductors |
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LPC2146 Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 2 page choosebetweenGoodLink™andSoftConnect™functionality. Eachmicrocontrollerisalsoequippedwithuptotwo10-bit A/Dconvertersanda10-bitD/Aconverter. Multipleserialcommunicationsinterfacesincreasedesign flexibility,providelargerbuffersize,anddeliverhigher processingpower.Therearetwo16C550UARTs,twoFast I2C-bus(400kbps)interfaces,andtwoSPIinterfaces(onewith capabilitiesforbufferingandvariabledatalength). Therearetwo32-bittimers(eachwithfourcaptureand comparechannels),aPWMunitwithsixoutputs,areal-time clock,andaWatchdogtimer. Fordebugging,eachdevicesupportsreal-timeemulation andembeddedtracesupportandhasanintegratedvectored interruptcontroller(VIC).Also,forcompatibilitywithexisting tools,eachdeviceusesthestandardARMtest/debugJTAG interface. Otherfeaturesinclude45FastI/Opins(5-Vtolerant)with switchingupto15MHz,andanoperatingtemperaturerange of-40to85°C. Third-Party Development Tools Throughthird-partysuppliers,weofferarangeof developmenttoolsforourmicrocontrollers.Forthemost currentlisting,pleasevisitwww.nxp.com/microcontrollers. Up to 512 KB of 128-bit-wide ISP/IAP Flash Up to 40 KB of SRAM Two 32-bit timers (four capture/ compare channels each) E-ICE/RT interface and embedded-trace macrocell 60-MHz, 32-bit ARM7TDMI-S core with AHB and APB interfaces Power management, 3.3-V supply, real-time clock, Watchdog timer, PLL PWM unit (six outputs) USB 2.0 full-speed (12 Mbps device) Up to two 10-bit A/D converters (up to 14 channels each) Available 10-bit D/A converter (one channel) Two I2C SPI, SSP 45 I/O ports UART0 UART1 Vectored interrupt controller LPC214x block diagram Type Memory Serial interfaces ADC/DAC options Package Flash (KB) SRAM (KB) USB 2.0 (12 Mbps) USB DMA I2C UART SPI/SSP ADC channels (10-bit) DAC channels (10-bit) LPC2141 32 8 1 2 2 2 6 LQFP64 LPC2142 64 16 1 2 2 2 6 1 LQFP64 LPC2144 128 16 1 2 2 2 14 1 LQFP64 LPC2146 256 40 1 1 2 2 2 14 1 LQFP64 LPC2148 512 40 1 1 2 2 2 14 1 LQFP64 LPC214x selection guide www.nxp.com © 2007 NXP N.V. All rights reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: January 2007 Document order number: 9397 750 15816 Printed in the USA |
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