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LPC11C14FBD48-301 Datasheet(PDF) 37 Page - NXP Semiconductors |
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LPC11C14FBD48-301 Datasheet(HTML) 37 Page - NXP Semiconductors |
37 / 62 page LPC11CX2_CX4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 27 June 2011 37 of 62 NXP Semiconductors LPC11Cx2/Cx4 32-bit ARM Cortex-M0 microcontroller Conditions: Tamb = 25 C; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW externally. (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 7. Active mode: Typical supply current IDD versus supply voltage VDD for different system clock frequencies Conditions: VDD = 3.3 V; active mode entered executing code while(1){} from flash; all peripherals disabled in the SYSAHBCLKCTRL register (SYSAHBCLKCTRL = 0x1F); all peripheral clocks disabled; internal pull-up resistors disabled; BOD disabled; pin CAN_RXD pulled LOW externally. (1) System oscillator and system PLL disabled; IRC enabled. (2) System oscillator and system PLL enabled; IRC disabled. Fig 8. Active mode: Typical supply current IDD versus temperature for different system clock frequencies VDD (V) 1.8 3.6 3.0 2.4 002aaf390 4 8 12 IDD (mA) 0 12 MHz(1) 24 MHz(2) 36 MHz(2) 48 MHz(2) temperature ( °C) −40 85 35 10 60 −15 002aaf391 4 8 12 IDD (mA) 0 12 MHz(1) 24 MHz(2) 36 MHz(2) 48 MHz(2) |
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