2

LZ0P3610/3611/3612/3615

PIN DESCRIPTION

ABSOLUTE MAXIMUM RATINGS

SYMBOL

PIN NAME

OD

Output transistor drain

OS

Output signals

Reset transistor clock

Vertical shift register clock

Horizontal shift register clock

OFD

Overflow drain

PW

P-well

GND

Ground

No connection

PARAMETER

SYMBOL

RATING

UNIT

Output transistor drain voltage

0 to +18

V

Overflow drain voltage

Internal output

V

Reset gate clock voltage

Internal output

V

Vertical shift register clock voltage

–10.5 to +17.5

V

Horizontal shift register clock voltage

–0.3 to +12

V

Voltage difference between P-well and vertical clock

–28 to 0

V

Voltage difference between vertical clocks

0 to +15

V

–20 to +70

˚C

Storage temperature

–10 to +60

˚C

Ambient operating temperature

3

2

1

NOTE

NOTES :

applied below 26 Vp-p.

applied below 8 Vp-p.

3. When clock width is below 10 µs, and clock duty factor is below 0.1%, voltage difference between vertical clocks will be

below 27 V.