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SAM9G45 Datasheet(PDF) 6 Page - ATMEL Corporation |
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SAM9G45 Datasheet(HTML) 6 Page - ATMEL Corporation |
6 / 55 page 6 6438GS–ATARM–13-Jul-11 SAM9G45 PC0 - PC31 Parallel IO Controller C I/O (1) Pulled-up input at reset (100k Ω)(3), Schmitt trigger PD0 - PD31 Parallel IO Controller D I/O (1) Pulled-up input at reset (100k Ω)(3), Schmitt trigger PE0 - PE31 Parallel IO Controller E I/O (1) Pulled-up input at reset (100k Ω)(3), Schmitt trigger DDR Memory Interface- DDR2/SDRAM/LPDDR Controller DDR_D0 - DDR_D15 Data Bus I/O VDDIOM0 Pulled-up input at reset DDR_A0 - DDR_A13 Address Bus Output VDDIOM0 0 at reset DDR_CLK- #DDR_CLK DDR differential clock input Output VDDIOM0 DDR_CKE DDR Clock Enable Output High VDDIOM0 DDR_CS DDR Chip Select Output Low VDDIOM0 DDR_WE DDR Write Enable Output Low VDDIOM0 DDR_RAS- DDR_CAS Row and Column Signal Output Low VDDIOM0 DDR_DQM[0..1] Write Data Mask Output VDDIOM0 DDR_DQS[0..1] Data Strobe Output VDDIOM0 DDR_BA0 - DDR_BA1 Bank Select Output VDDIOM0 DDR_VREF Reference Voltage Input VDDIOM0 External Bus Interface - EBI D0 -D31 Data Bus I/O VDDIOM1 Pulled-up input at reset A0 - A25 Address Bus Output VDDIOM1 0 at reset NWAIT External Wait Signal Input Low VDDIOM1 Static Memory Controller - SMC NCS0 - NCS5 Chip Select Lines Output Low VDDIOM1 NWR0 - NWR3 Write Signal Output Low VDDIOM1 NRD Read Signal Output Low VDDIOM1 NWE Write Enable Output Low VDDIOM1 NBS0 - NBS3 Byte Mask Signal Output Low VDDIOM1 CompactFlash Support CFCE1 - CFCE2 CompactFlash Chip Enable Output Low VDDIOM1 CFOE CompactFlash Output Enable Output Low VDDIOM1 CFWE CompactFlash Write Enable Output Low VDDIOM1 CFIOR CompactFlash IO Read Output Low VDDIOM1 Table 3-1. Signal Description List (Continued) Signal Name Function Type Active Level Reference Voltage Comments |
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