1

2

SCL

3

4

5

6

7

8

SDA

A

A

A

Data 0

R/W

t

pv

9

0

0

0

0

0

0

0

1

0.7

0.0

Data 1

1.7

1.0 A

S

0

1

0

0

0

0

AD

DR

0

P

Slave Address

Command Byte

Data to Port 0

Data to Port 1

Start Condition

Acknowledge

From Slave

Write to Port

Data Out from Port 1

Data Out from Port 0

Data Valid

Acknowledge

From Slave

Acknowledge

From Slave

t

pv

TCA6416A

www.ti.com

SCPS194A – MAY 2009 – REVISED NOVEMBER 2009

Reset Input (RESET)

the I/O levels at the P port can be changed externally or through the master. This input requires a pullup resistor

Interrupt Output (INT)

INT is valid. Resetting the interrupt circuit is achieved when data on the port is changed to the original setting or

when data is read from the port that generated the interrupt. Resetting occurs in the read mode at the

acknowledge (ACK) or not acknowledge (NACK) bit after the rising edge of the SCL signal. Interrupts that occur

during the ACK or NACK clock pulse can be lost (or be very short) due to the resetting of the interrupt during this

pulse. Each change of the I/Os after resetting is detected and is transmitted as INT.

Reading from or writing to another device does not affect the interrupt circuit, and a pin configured as an output

cannot cause an interrupt. Changing an I/O from an output to an input may cause a false interrupt to occur, if the

state of the pin does not match the contents of the Input Port register.

application. INT should be connected to the voltage source of the device that requires the interrupt information.

Bus Transactions

Data is exchanged between the master and TCA6416A through write and read commands.

Writes

Data is transmitted to the TCA6416A by sending the device address and setting the least-significant bit (LSB) to

a logic 0 (see Figure 4 for device address). The command byte is sent after the address and determines which

register receives the data that follows the command byte. There is no limitation on the number of data bytes sent

in one write transmission.

The eight registers within the TCA6416A are configured to operate as four register pairs. The four pairs are input

ports, output ports, polarity inversion ports and configuration ports. After sending data to one register, the next

data byte is sent to the other register in the pair (see Figure 6 and Figure 7). For example, if the first byte is send

to Output Port 1 (register 3), the next byte is stored in Output Port 0 (register 2).

There is no limitation on the number of data bytes sent in one write transmission. In this way, each 8-bit register

may be updated independently of the other registers.

Figure 6. Write to Output Port Register

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Copyright © 2009, Texas Instruments Incorporated

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