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LH540202 Datasheet(PDF) 10 Page - Sharp Corporation

Part # LH540202
Description  CMOS 1024 x 9 Asynchronous FIFO
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Manufacturer  SHARP [Sharp Corporation]
Direct Link  http://sharp-world.com/
Logo SHARP - Sharp Corporation

LH540202 Datasheet(HTML) 10 Page - Sharp Corporation

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AC ELECTRICAL CHARACTERISTICS
1 (Over Operating Range)
SYMBOL
PARAMETER
tA = 15 ns
tA = 20 ns
tA = 25 ns
tA = 35 ns
tA = 50 ns
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
READ CYCLE TIMING
tRC
Read Cycle Time
25
30
35
45
65
ns
tA
Access Time
15
20
25
35
50
ns
tRR
Read Recovery Time
10
10
10
10
15
ns
tRPW
Read Pulse Width
2
15–20
25–35–
50
ns
tRLZ
Data Bus Active from Read LOW
3
5–
5–5–5–
5–
ns
tWLZ
Data Bus Active from Write HIGH
3,4
10–10
10–10–
10
ns
tDV
Data Valid from Read Pulse HIGH
5
5–5–5–
5–
ns
tRHZ
Data Bus High-Z from Read HIGH
3
–15
15–15–15
20
ns
WRITE CYCLE TIMING
tWC
Write Cycle Time
25
30
35
45
65
ns
tWPW
Write Pulse Width
2
15–20
25–35–
50
ns
tWR
Write Recovery Time
10
10
10
10
15
ns
tDS
Data Setup Time
10
10
10
15
20
ns
tDH
Data Hold Time
0
0–0–0–
0–
ns
RESET TIMING
tRSC
Reset Cycle Time
25
30
35
45
65
ns
tRS
Reset Pulse Width
2
15–20
25–35–
50
ns
tRSR
Reset Recovery Time
10
10
10
10
15
ns
tRRSS
Read HIGH to RS HIGH
15–20
25–35–
50
ns
tWRSS
Write HIGH to RS HIGH
15
20
25
35
50
ns
RETRANSMIT TIMING
5
tRTC
Retransmit Cycle Time
25
30
35
45
65
ns
tRT
Retransmit Pulse Width
2
15–20
25–35–
50
ns
tRTR
Retransmit Recovery Time
10
10
10
10
15
ns
FLAG TIMING
tEFL
Reset LOW to Empty Flag LOW
25
30
35
45
65
ns
tHFH,FFH
Reset LOW to Half-Full and Full
Flags HIGH
–25
30–35–45
65
ns
tREF
Read LOW to Empty Flag LOW
15
20
25
35
45
ns
tRFF
Read HIGH to Full Flag HIGH
15
20
25
35
45
ns
tWEF
Write HIGH to Empty Flag HIGH
15
20
25
35
45
ns
tWFF
Write LOW to Full Flag LOW
15
20
25
35
45
ns
tWHF
Write LOW to Half-Full Flag LOW
15
20
25
35
45
ns
tRHF
Read HIGH to Half-Full Flag HIGH
–15
20–25–35
45
ns
EXPANSION TIMING
tXOL
Expansion Out LOW
–18
20–25–35
50
ns
tXOH
Expansion Out HIGH
18
20
25
35
50
ns
tXI
Expansion In Pulse Width
15
20
25
35
50
ns
tXIR
Expansion In Recovery Time
10
10
10
10
10
ns
tXIS
Expansion in Setup Time
7
10
–10–15–
15
ns
NOTES:
1.
All timing measurements are performed at ‘AC Test Condition’ levels.
2.
Pulse widths less than minimum value are not allowed.
LH540202
CMOS 1024
× 9 Asynchronous FIFO
10


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