LH5324500

FEATURES

•• 3,145,728 words × 8 bit organization

(Byte mode)

1,572,864 words

× 16 bit organization

(Word mode)

•• Access time: 150 ns (MAX.)

•• Power consumption:

Operating: 357.5 mW (MAX.)

Standby: 550

µW (MAX.)

•• Static operation

•• TTL compatible I/O

•• Three-state outputs

•• Single +5 V power supply

•• Package: 44-pin, 600-mil SOP

DESCRIPTION

The LH5324500 is a 24M-bit mask-programmable

ROM organized as 3,145,728

× 8 bits (Byte mode) or

1,572,864

× 16 bits (Word mode) that can be selected

by a BYTE input pin. It is fabricated using silicon-gate

CMOS process technology.

PIN CONNECTIONS

5324500-1

TOP VIEW

2

3

4

5

8

9

39

38

37

36

35

34

31

28

6

7

33

32

BYTE

GND

10

11

12

41

40

13

30

29

OE

CE

44-PIN SOP

14

15

16

17

18

19

20

21

25

27

26

24

23

GND

42

1

NC

22

44

43

Figure 1. Pin Connections for SOP Package

CMOS 24M (3M

× 8/1.5M × 16) MROM

1