SH2002-DC90A

Printheads

Rev.A

3/5

Timing chart

*If delay time for Driver Out can not be secured enough, there is a possibility that VH would fluctuate

greatly. Please design the circuit so that VH does not exceed peak voltage (Vp).

tw CLK

t setup DI

t hold DI

t setup LAT

t hold LAT

CLK

(CLOCK)

/LAT

(LATCH)

DI(DATA IN)

"High":BLACK

"LOW" :WHITE

"High": HOLD

"LOW" : THROUGH

min.12.5

μsec

(Max. t do)*

tw LAT

t set up ST B

tdo

tdo

/STBｎ

(STROBE)

DRIVER

OUT

BEO