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LH5164A Datasheet(PDF) 8 Page - Sharp Corporation

Part No. LH5164A
Description  CMOS 64K (8K x 8) Static RAM
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Manufacturer  SHARP [Sharp Corporation]
Direct Link  http://sharp-world.com/
Logo SHARP - Sharp Corporation

LH5164A Datasheet(HTML) 8 Page - Sharp Corporation

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DATA VALID
tDH
tDW
WE
DIN
(NOTE 7)
tCW
A0 - A12
tWC
5164A-5
tWR
tCW
tAW
CE1
CE2
tAS
tWZ
tWP
(NOTE 2)
(NOTE 4)
tWR
(NOTE 3)
DOUT
(NOTE 5)
(NOTE 1)
tWR
HIGH-Z
tOW
(NOTE 6)
OE = 'LOW'
1. The writing occurs during an overlapping period of CE1 = 'LOW,' CE2 = 'HIGH,' and WE = 'LOW' (tWP).
2. tCW is defined as the time from the last occuring transition, either CE1 LOW transition or CE2 HIGH transition,
to the time when the writing is finished.
3. tAS is defined as the time from address change to writing start.
4. tWR is defined as the time from writing finish to address change.
5. If CE1 LOW transition or CE2 HIGH transition occurs at the same time or after WE LOW transition, the
outputs will remain high-impedance.
6. If CE1 HIGH transition or CE2 LOW transition occurs at the same time or before WE HIGH transition, the
outputs will remain high-impedance.
7. While I/O pins are in the output state, input signals with the opposite logic level must not be applied.
NOTES:
Figure 7. Write Cycle 2
LH5164A/AH
CMOS 64K (8K
× 8) Static RAM
8


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