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ISL9444 Datasheet(PDF) 3 Page - Intersil Corporation |
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ISL9444 Datasheet(HTML) 3 Page - Intersil Corporation |
3 / 24 page ISL9444 3 FN7665.1 July 19, 2011 6 EN/SS1 This pin provides an enable/disable function and soft-starting for PWM1 output. The output is disabled when the pin is pulled to GND. During start-up, a regulated 1.55µA soft-start current charges an external capacitor connected at this pin. When the voltage on the EN/SS1 pin reaches 1.3V, the PWM1 output becomes active. From 1.3V to 2.0V, the reference voltage of the PWM1 is clamped to the voltage at EN/SS1 minus 1.3V. The capacitance of the soft-start capacitors sets the soft-starting time and enable delay time. Setting the soft-starting time too short might create undesirable overshoot at the output during start-up. VCC_5V UVLO discharges the EN/SS1 via an internal MOSFET. 7 FB1 PWM1 feedback input. Connect FB1 to a resistive voltage divider from the output of PWM1 to GND to adjust the output voltage. 8 OCSET1 A resistor from this pin to ground adjusts the overcurrent threshold for PWM1. 9 RT A resistor from this pin to ground adjusts the switching frequency from 200kHz to 1.2MHz. The switching frequency of the PWM controller is determined by the resistor, RT, where tSW is the switching period in µs. 10 PGOOD1 Open drain logic output used to indicate the status of the PWM1 output voltage. This pin is pulled down when the PWM1 output is not within ±11% of the nominal voltage. 11 PGOOD2 Open drain logic output used to indicate the status of the PWM2 output voltage. This pin is pulled down when the PWM2 output is not within ±11% of the nominal voltage. 12 PGOOD3 Open drain logic output used to indicate the status of the PWM3 output voltage. This pin is pulled down when the PWM3 output is not within ±11% of the nominal voltage. 13 PG3_DLY A capacitor connected between this pin and ground sets a delay between PWM3 output voltage reaching ±11% of regulation and PGOOD3 going high. There is no delay when PWM3 goes out of regulation and PGOOD3 is pulled low. 14 EN2 Enable/Disable input for PWM2. The output of PWM2 is enabled when this pin is pulled HIGH, and disabled when this pin is pulled LOW. PGOOD2 is pulled LOW 1µs after EN2 is pulled LOW. Do not leave this pin floating. 15 SGND This is the small-signal ground common to all 3 controllers. It is suggested to route this separately from the high current ground (PGND). SGND and PGND can be tied together if there is one solid ground plane with no noisy currents around the chip. All voltage levels are measured with respect to this pin. 16 OCSET2 A resistor from this pin to ground adjusts the overcurrent threshold for PWM2. 17 FB2 PWM2 feedback input. Connect FB2 to a resistive voltage divider from the output of PWM2 to GND to adjust the output voltage. 18 TK/SS2 Dual function pin. The reference voltage of PWM2 is clamped to the voltage at TK/SS2 during start-up. When this pin is used for tracking, another channel is configured as the master and the output voltage of the master channel is applied to this pin via a resistor divider. When used for soft-starting control, a soft-start capacitor is connected from this pin to GND. A regulated 1.55µA soft-starting current charges up the soft-start capacitor. Value of the soft-start capacitor sets the PWM2 output voltage ramp. 19 OCSET3 A resistor from this pin to ground adjusts the overcurrent threshold for PWM3. 20 FB3 PWM3 feedback input. Connect FB3 to a resistive voltage divider from the output of PWM3 to GND to adjust the output voltage. 21 TK/SS3 Dual function pin. The reference voltage of PWM3 is clamped to the voltage at TK/SS3 during start-up. When this pin is used for tracking, another channel is configured as the master and the output voltage of the master channel is applied to this pin via a resistor divider. When used for soft-starting control, a soft-start capacitor is connected from this pin to GND. A regulated 1.55µA soft-starting current charges up the soft-start capacitor. Value of the soft-start capacitor sets the PWM3 output voltage ramp. 22 EN3 Enable/Disable input for PWM3. The output of PWM3 is enabled when this pin is pulled HIGH, and disabled when this pin is pulled LOW. PGOOD3 is pulled LOW 1µs after EN3 is pulled LOW. Do not leave this pin floating. 23 MODE/SYNC Dual function pin. Tie this pin to ground or VCC_5V for light load operation mode selection. Connect this pin to ground to select Diode Emulation Mode with pulse skipping at light load. While connected to VCC_5V, the controllers operate in PWM Mode at light load. Connect this pin to CLKOUT of another ISL9444 or an external clock for synchronization. The controller operates in PWM at light load when synchronized with another ISL9444 or with an external clock. Pin Descriptions (Continued) PIN NAME FUNCTION RT 23.36 1.5 tSW 0.36 – × () × () kΩ ⋅ = (EQ. 1) |
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