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HMCAD1050-40 Datasheet(PDF) 8 Page - Hittite Microwave Corporation

Part No. HMCAD1050-40
Description  Dual 13/12-Bit 20/40 MSPS A/D Converter
Download  14 Pages
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Maker  HITTITE [Hittite Microwave Corporation]
Homepage  http://www.hittite.com
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HMCAD1050-40 Datasheet(HTML) 8 Page - Hittite Microwave Corporation

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For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: apps@hittite.com
0
0 - 8
HMCAD1050-40
v01.0411
Dual 13/12-Bit 20/40 MSPS
a/D Converter
table 2: Pin Function
Pin #
Name
Description
21
PD_n
Full chip Power Down mode when Low. All digital outputs reset to zero.
After chip power up always
apply Power Down mode before using Active Mode to reset chip.
22
oe_n_1
output enable Channel 0. tristate when high
24, 41, 58
ovDD
I/o ring post-driver supply voltage. voltage range 1.7 to 3.6v
25, 40, 57
ovss
Ground for I/o ring
26
D1_0
output Data Channel 1 (LsB, 13 bit output or 1vpp full scale range )
27
D1_1
output Data Channel 1 (LsB, 12 bit output 2vpp full scale range)
28
D1_2
output Data Channel 1
29
D1_3
output Data Channel 1
30
D1_4
output Data Channel 1
31
D1_5
output Data Channel 1
32
D1_6
output Data Channel 1
33
D1_7
output Data Channel 1
34
D1_8
output Data Channel 1
35
D1_9
output Data Channel 1
36
D1_10
output Data Channel 1
37
D1_11
output Data Channel 1 (MsB for 1vpp full scale range, see reference voltages section)
38
D1_12
output Data Channel 1 (MsB for 2vpp full scale range)
39
ornG_1
out of range flag Channel 1. High when input signal is out of range
42
CK_eXt
output clock signal for data synchronization. CMos levels
43
D0_0
output Data Channel 0 (LsB, 13 bit output or 1vpp full scale range)
44
D0_1
output Data Channel 0 (LsB, 12 bit output 2vpp full scale range)
45
D0_2
output Data Channel 0
46
D0_3
output Data Channel 0
47
D0_4
output Data Channel 0
48
D0_5
output Data Channel 0
49
D0_6
output Data Channel 0
50
D0_7
output Data Channel 0
51
D0_8
output Data Channel 0
52
D0_9
output Data Channel 0
53
D0_10
output Data Channel 0
54
D0_11
output Data Channel 0 (MsB for 1vpp full scale range, see reference voltages section)
55
D0_12
output Data Channel 0 (MsB for 2vpp full scale range)
56
ornG_0
out of range flag Channel 0. High when input signal is out of range
59
oe_n_0
output enable Channel 0. tristate when high
60, 61
CM_eXtBC_1, CM_
eXtBC_0
Bias control bits for the buffer driving pin CM_eXt
00: oFF
01: 50uA
10: 500uA
11: 1mA
62, 63
sLP_n_1, sLP_n_0
sleep Mode
00: sleep Mode
01: Channel 0 active
10: Channel 1 active
11: Both channels active


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