SEMTECH

Today's Results

SK10LVE111

SK100LVE111

Low Voltage 1:9 Differential

ECL/ PECL Clock Driver

AC Characteristics

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8

1. 10LVE circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established.

The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained.

Outputs are termionated through a 50

Ω resistor to –2.0V.

2. The same DC parameter values apply across the full VEE range of –3.0 to –3.8V. Outputs are terminated through a 50

Ω

resistor to –2.0V. 100LVE circuits are designed to meet the DC specifications shown in the table where transverse airflow

greater than 500 lfpm is maintained.

3. Absolute maximum rating, beyond which device life may be impaired unless otherwise specificed on an individual data sheet.

4. Parametric values specified at:

10LVE Series:

–3.0 to –3.8V

100 LVE Series: –3.0 to –3.8V; PECL Power Supply: +3.0V to +3.8V.

5. Guaranteed HIGH signal for all inputs.

6. Guaranteed LOW signal for all inputs.

7. These values are for VCC = 3.3V. Level Specifications will vary 1:1 with VCC.

8. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing

point of the differential output signals.

9. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of theoutput

signal.

10. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.