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TMS320C2802PZS Datasheet(PDF) 9 Page - Texas Instruments |
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TMS320C2802PZS Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 145 page  TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801, TMS320C2802 TMS320C2801, TMS320F28016, TMS320F28015 www.ti.com SPRS230M – OCTOBER 2003 – REVISED MARCH 2011 Digital Signal Processors Check for Samples: TMS320F2809, TMS320F2808, TMS320F2806, TMS320F2802, TMS320F2801, TMS320C2802, TMS320C2801, TMS320F28016, TMS320F28015 1 F280x, F2801x, C280x DSPs 1.1 Features 1234 • High-Performance Static CMOS Technology • 128-Bit Security Key/Lock – 100 MHz (10-ns Cycle Time) – Protects Flash/OTP/L0/L1 Blocks – 60 MHz (16.67-ns Cycle Time) – Prevents Firmware Reverse Engineering – Low-Power (1.8-V Core, 3.3-V I/O) Design • Three 32-Bit CPU Timers • JTAG Boundary Scan Support (1) • Enhanced Control Peripherals • High-Performance 32-Bit CPU ( TMS320C28x™) – Up to 16 PWM Outputs – 16 x 16 and 32 x 32 MAC Operations – Up to 6 HRPWM Outputs With 150-ps MEP Resolution – 16 x 16 Dual MAC – Up to Four Capture Inputs – Harvard Bus Architecture – Up to Two Quadrature Encoder Interfaces – Atomic Operations – Up to Six 32-bit/Six 16-bit Timers – Fast Interrupt Response and Processing • Serial Port Peripherals – Unified Memory Programming Model – Up to 4 SPI Modules – Code-Efficient (in C/C++ and Assembly) – Up to 2 SCI (UART) Modules • On-Chip Memory – Up to 2 CAN Modules – F2809: 128K x 16 Flash, 18K x 16 SARAM F2808: 64K x 16 Flash, 18K x 16 SARAM – One Inter-Integrated-Circuit (I2C) Bus F2806: 32K x 16 Flash, 10K x 16 SARAM • 12-Bit ADC, 16 Channels F2802: 32K x 16 Flash, 6K x 16 SARAM – 2 x 8 Channel Input Multiplexer F2801: 16K x 16 Flash, 6K x 16 SARAM – Two Sample-and-Hold F2801x: 16K x 16 Flash, 6K x 16 SARAM – Single/Simultaneous Conversions – 1K x 16 OTP ROM (Flash Devices Only) – Fast Conversion Rate: – C2802: 32K x 16 ROM, 6K x 16 SARAM 80 ns - 12.5 MSPS (F2809 only) C2801: 16K x 16 ROM, 6K x 16 SARAM 160 ns - 6.25 MSPS (280x) • Boot ROM (4K x 16) 267 ns - 3.75 MSPS (F2801x) – With Software Boot Modes (via SCI, SPI, – Internal or External Reference CAN, I2C, and Parallel I/O) • Up to 35 Individually Programmable, – Standard Math Tables Multiplexed GPIO Pins With Input Filtering • Clock and System Control • Advanced Emulation Features – Dynamic PLL Ratio Changes Supported – Analysis and Breakpoint Functions – On-Chip Oscillator – Real-Time Debug via Hardware – Watchdog Timer Module • Development Support Includes • Any GPIO A Pin Can Be Connected to One of – ANSI C/C++ Compiler/Assembler/Linker the Three External Core Interrupts – Code Composer Studio™ IDE • Peripheral Interrupt Expansion (PIE) Block That – DSP/BIOS™ Supports All 43 Peripheral Interrupts – Digital Motor Control and Digital Power Software Libraries • Low-Power Modes and Power Savings – IDLE, STANDBY, HALT Modes Supported (1) IEEE Standard 1149.1-1990 Standard Test Access Port and – Disable Individual Peripheral Clocks Boundary Scan Architecture 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 TMS320C28x, Code Composer Studio, DSP/BIOS, MicroStar BGA, C28x, TI, TMS320C2000 are trademarks of Texas Instruments. 3 eZdsp is a trademark of Spectrum Digital. 4 All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2011, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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