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SM320F2808-EP Datasheet(PDF) 100 Page - Texas Instruments |
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SM320F2808-EP Datasheet(HTML) 100 Page - Texas Instruments |
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100 / 118 page  www.ti.com 6.9.4 I2C Electrical Specification and Timing 6.9.5 Serial Peripheral Interface (SPI) Master Mode Timing SM320F2808-EP, SM320F2806-EP SM320F2801-EP Digital Signal Processors SGLS316A – MARCH 2006 – REVISED FEBRUARY 2007 Table 6-31. I2C Timing TEST CONDITIONS MIN MAX UNIT fSCL SCL clock frequency I2C clock module frequency is between 7 400 kHz MHz and 12 MHz and I2C prescaler and clock divider registers are configured appropriately vil Low level input voltage 0.3 VDDIO V Vih High level input voltage 0.7 VDDIO V Vhys Input hysteresis 0.05 VDDIO V Vol Low level output voltage 3 mA sink current 0 0.4 V tLOW Low period of SCL clock I2C clock module frequency is between 7 1.3 µs MHz and 12 MHz and I2C prescaler and clock divider registers are configured appropriately tHIGH High period of SCL clock I2C clock module frequency is between 7 0.6 µs MHz and 12 MHz and I2C prescaler and clock divider registers are configured appropriately lI Input current with an input voltage -10 10 µA between 0.1 VDDIO and 0.9 VDDIO MAX Table 6-32 lists the master mode timing (clock phase = 0) and Table 6-33 lists the timing (clock phase = 1). Figure 6-18 and Figure 6-19 show the timing waveforms. 100 Electrical Specifications Submit Documentation Feedback |
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