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MSP430F135IRTDR Datasheet(PDF) 39 Page - Texas Instruments

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Part No. MSP430F135IRTDR
Description  MIXED SIGNAL MICROCONTROLLER
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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MSP430F135IRTDR Datasheet(HTML) 39 Page - Texas Instruments

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MSP430x13x, MSP430x14x, MSP430x14x1
MIXED SIGNAL MICROCONTROLLER
SLAS272F − JULY 2000 − REVISED JUNE 2004
39
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature (unless otherwise
noted) (continued)
Flash Memory
PARAMETER
TEST
CONDITIONS
VCC
MIN
NOM
MAX
UNIT
VCC(PGM/
ERASE)
Program and Erase supply voltage
2.7
3.6
V
fFTG
Flash Timing Generator frequency
257
476
kHz
IPGM
Supply current from DVCC during program
2.7 V/ 3.6 V
3
5
mA
IERASE
Supply current from DVCC during erase
2.7 V/ 3.6 V
3
7
mA
tCPT
Cumulative program time
see Note 1
2.7 V/ 3.6 V
4
ms
tCMErase
Cumulative mass erase time
see Note 2
2.7 V/ 3.6 V
200
ms
Program/Erase endurance
104
105
cycles
tRetention
Data retention duration
TJ = 25°C
100
years
tWord
Word or byte program time
35
tBlock, 0
Block program time for 1st byte or word
30
tBlock, 1-63
Block program time for each additional byte or word
see Note 3
21
tFTG
tBlock, End
Block program end-sequence wait time
see Note 3
6
tFTG
tMass Erase
Mass erase time
5297
tSeg Erase
Segment erase time
4819
NOTES:
1. The cumulative program time must not be exceeded when writing to a 64-byte flash block. This parameter applies to all programming
methods: individual word/byte write and block write modes.
2. The mass erase duration generated by the flash timing generator is at least 11.1ms ( = 5297x1/fFTG,max = 5297x1/476kHz). To
achieve the required cumulative mass erase time the Flash Controller’s mass erase operation can be repeated until this time is met.
(A worst case minimum of 19 cycles are required).
3. These values are hardwired into the Flash Controller’s state machine (tFTG = 1/fFTG).
JTAG Interface
PARAMETER
TEST
CONDITIONS
VCC
MIN
NOM
MAX
UNIT
fTCK
TCK input frequency
see Note 1
2.2 V
0
5
MHz
fTCK
TCK input frequency
see Note 1
3 V
0
10
MHz
RInternal
Internal pull-up resistance on TMS, TCK, TDI/TCLK
see Note 2
2.2 V/ 3 V
25
60
90
k
NOTES:
1. fTCK may be restricted to meet the timing requirements of the module selected.
2. TMS, TDI/TCLK, and TCK pull-up resistors are implemented in all versions.
JTAG Fuse (see Note 1)
PARAMETER
TEST
CONDITIONS
VCC
MIN
NOM
MAX
UNIT
VCC(FB)
Supply voltage during fuse-blow condition
TA = 25°C
2.5
V
VFB
Voltage level on TDI/TCLK for fuse-blow: F versions
6
7
V
IFB
Supply current into TDI/TCLK during fuse blow
100
mA
tFB
Time to blow fuse
1
ms
NOTES:
1. Once the fuse is blown, no further access to the MSP430 JTAG/Test and emulation features is possible. The JTAG block is switched
to bypass mode.


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