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MSP430F4132IPMR Datasheet(PDF) 26 Page - Texas Instruments |
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MSP430F4132IPMR Datasheet(HTML) 26 Page - Texas Instruments |
26 / 82 page MSP430F41x2 MIXED SIGNAL MICROCONTROLLER SLAS648E -- APRIL 2009 -- REVISED MARCH 2011 26 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature (unless otherwise noted) (continued) Schmitt-trigger inputs -- ports P1, P2, P3, P4, P5, P6, and P7, RST/NMI, JTAG (TCK, TMS, TDI/TCLK, TDO/TDI) PARAMETER VCC MIN MAX UNIT V Positi e going inp t threshold oltage 2.2 V 1.1 1.55 V VIT+ Positive-going input threshold voltage 3V 1.5 1.98 V V Negati e going inp t threshold oltage 2.2 V 0.4 0.9 V VIT-- Negative-going input threshold voltage 3V 0.9 1.3 V V Input voltage hysteresis (V V ) 2.2 V 0.3 1.1 V Vhys Input voltage hysteresis (VIT+ -- VIT--) 3V 0.5 1 V inputs Px.y, TAx PARAMETER TEST CONDITIONS VCC MIN MAX UNIT t External interrupt timing Port P1, P2: P1.x to P2.x, external trigger signal 2.2 V 62 ns t(int) External interrupt timing Port P1, P2: P1.x to P2.x, external trigger signal for the interrupt flag (see Note 1) 3V 50 ns t Timer A capture timing TA0 TA1 TA2 2.2 V 62 ns t(cap) Timer_A capture timing TA0, TA1, TA2 3V 50 ns f Timer_A clock frequency externally TACLK INCLK: t t 2.2 V 8 MHz f(TAext) Timer_A clock frequency externally applied to pin TACLK, INCLK: t(H) =t(L) 3V 10 MHz f Timer A clock frequency SMCLK or ACLK signal selected 2.2 V 8 MHz f(TAint) Timer_A,clock frequency SMCLK or ACLK signal selected 3V 10 MHz NOTES: 1. The external signal sets the interrupt flag every time the minimum t(int) parameters are met. It may be set even with trigger signals shorter than t(int). leakage current -- ports P1, P2, P3, P4, P5, P6, and P7 (see Note 1) PARAMETER TEST CONDITIONS VCC MIN MAX UNIT Ilkg(Px.y) Leakage current Port Px V(Px.y) (see Note 2) 2.2 V/3 V 50 nA NOTES: 1. The leakage current is measured with VSS or VCC applied to the corresponding pin(s), unless otherwise noted. 2. The port pin must be selected as input. |
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