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MSP430F1101AIPWR Datasheet(PDF) 4 Page - Texas Instruments

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Part No. MSP430F1101AIPWR
Description  MIXED SIGNAL MICROCONTROLLER
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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MSP430F1101AIPWR Datasheet(HTML) 4 Page - Texas Instruments

 
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MSP430C11x1, MSP430F11x1A
MIXED SIGNAL MICROCONTROLLER
SLAS241I − SEPTEMBER 1999 − REVISED DECEMBER 2008
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NO.
DESCRIPTION
NAME
DW, PW,
OR DGV
RGE
I/O
DESCRIPTION
P1.0/TACLK
13
13
I/O
General-purpose digital I/O pin/Timer_A, clock signal TACLK input
P1.1/TA0
14
14
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0
output/BSL transmit
P1.2/TA1
15
15
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1
output
P1.3/TA2
16
16
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2
output
P1.4/SMCLK/TCK
17
17
I/O
General-purpose digital I/O pin/SMCLK signal output/test clock, input terminal for
device programming and test
P1.5/TA0/TMS
18
18
I/O
General-purpose digital I/O pin/Timer_A, compare: Out0 output/test mode select,
input terminal for device programming and test
P1.6/TA1/TDI/TCLK
19
20
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output/test data input or
test clock input
P1.7/TA2/TDO/TDI
20
21
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output/test data output
terminal or data input during programming
P2.0/ACLK
8
6
I/O
General-purpose digital I/O pin/ACLK output
P2.1/INCLK
9
7
I/O
General-purpose digital I/O pin/Timer_A, clock signal at INCLK
P2.2/CAOUT/TA0
10
8
I/O
General-purpose digital I/O pin/Timer_A, capture: CCI0B input/ comparator_A,
output/BSL receive
P2.3/CA0/TA1
11
10
I/O
General-purpose digital I/O pin/Timer_A, compare: Out1 output/ comparator_A,
input
P2.4/CA1/TA2
12
11
I/O
General-purpose digital I/O pin/Timer_A, compare: Out2 output/ comparator_A,
input
P2.5/ROSC
3
24
I/O
General-purpose digital I/O pin/input for external resistor that defines the DCO
nominal frequency
RST/NMI
7
5
I
Reset or nonmaskable interrupt input
TEST
1
22
I
Selects test mode for JTAG pins on Port1. The device protection fuse is connected
to TEST.
VCC
2
23
Supply voltage
VSS
4
2
Ground reference
XIN
6
4
I
Input terminal of crystal oscillator
XOUT
5
3
O
Output terminal of crystal oscillator
QFN Pad
NA
Package
Pad
NA
QFN package pad connection to VSS recommended.
TDO or TDI is selected via JTAG instruction.


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