Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

LCDA15C-6 Datasheet(PDF) 4 Page - Semtech Corporation

Part No. LCDA15C-6
Description  Low Capacitance TVS Diode Array For Multi-mode Transciever Protection 
Download  6 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
Logo 

LCDA15C-6 Datasheet(HTML) 4 Page - Semtech Corporation

   
Zoom Inzoom in Zoom Outzoom out
 4 / 6 page
background image
4
ã 2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PROTECTION PRODUCTS
LCDA15C-6
Device Connection
Multi-Mode Tranceiver Protection Example
Device Connection Options for Protection of Six High-
Speed Data Lines
The LCDA16C-6 may be configured to protect up to six
I/O lines operating between 5 and 15V. It may be used
to protect the most popular serial data interface
standard lines making it ideal for use in equipment
utilizing multi-mode transceivers. Data lines are
connected at pins 1, 2, 3, 6, 7, and 8. Pins 4 and 5
are connected to ground. For best results, these pins
should be connected directly to a ground plane on the
board. The path length should be kept as short as
possible to minimize parasitic inductance.
Multi-Mode Transceiver Protection
A typical multi-mode transceiver protection circuit is
shown. The LCDA15C-6 is used to protect I/O lines
with external connections. The LCDA15C-6 adds a
maximum loading capacitance of 15pF with a working
voltage of 15V. This allows the transceiver to safely
operate in all modes without clipping or degradation of
the signal.
With proper design and layout, the transceiver port can
be protected to >15kV (HBM per IEC 61000-4-2).
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of fast rise-time transients such as ESD. The following
guidelines are recommended:
l
Place the LCDA15C-6 near the input terminals or
connectors to restrict transient coupling.
l
Minimize the path length between the LCDA15C-6
and the protected line.
l
Minimize all conductive loops including power and
ground loops.
l
The ESD transient return path to ground should be
kept as short as possible.
l
Never run critical signals near board edges.
l
Use ground planes whenever possible.
Applications Information


Html Pages

1  2  3  4  5  6 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn