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PCF8582C-2 Datasheet(PDF) 4 Page - NXP Semiconductors |
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PCF8582C-2 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 21 page Philips Semiconductors PCF8582C-2 256 × 8-bit CMOS EEPROM with I2C-bus interface Product data Rev. 04 — 25 October 2004 4 of 21 9397 750 14222 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Device addressing [1] The Most Significant Bit (MSB) ‘b7’ is sent first. A2, A1, A0 are hardware selectable pins. A system could have up to eight PCF8582C-2 devices on the same I2C-bus, equivalent to a 16 kbit EEPROM or 8 pages of 256 bytes of memory. The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level ‘1’ when connected to VDD, logic level ‘0’ when connected to GND). Figure 3 shows the various address combinations. Fig 2. Pin configuration. 1 2 3 4 8 7 6 5 A0 A1 A2 VSS SDA SCL PTC VDD PCF8582C-2 MGD928 Table 4: Pin description Symbol Pin Description A0 1 address input 0 A1 2 address input 1 A2 3 address input 2 VSS 4 negative supply voltage SDA 5 serial data input/output (I2C-bus) SCL 6 serial clock input (I2C-bus) PTC 7 programming time control output VDD 8 positive supply voltage Table 5: Device address code Selection Device code Chip Enable R/W Bit b7[1] b6 b5 b4 b3 b2 b1 b0 Device 1 0 1 0 A2 A1 A0 R/W |
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