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PCA9698DGG Datasheet(PDF) 9 Page - NXP Semiconductors |
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PCA9698DGG Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 48 page PCA9698 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 3 — 3 August 2010 9 of 48 NXP Semiconductors PCA9698 40-bit Fm+ I2C-bus advanced I/O port with RESET, OE and INT 7.3.1 5-bank register category • IP – Input registers • OP – Output registers • PI – Polarity Inversion registers • IOC – I/O Configuration registers • MSK – Mask interrupt registers If the Auto-Increment flag is set (AI = 1), the 3 least significant bits are automatically incremented after a read or write. This allows the user to program and/or read the 5 register banks sequentially. If more than 5 bytes of data are written and AI = 1, previous data in the selected registers will be overwritten or reread. Reserved registers are skipped and not accessed (refer to Table 3). If the Auto-Increment flag is cleared (AI = 0), the 3 least significant bits are not incremented after data is read or written, only one register will be repeatedly read or written. 7.3.2 1-bank register category • OUTCONF – Output Structure Configuration register • ALLBNK – All Bank Control register • MODE – Mode Selection register If more than 1 byte of data is written or read, previous data in the same register is overwritten independently of the value of AI. 7.4 Register definitions Table 3. Register summary Reg # D5 D4 D3 D2 D1 D0 Name Type Function Input Port registers 00h 0 0 0 0 0 0 IP0 read only Input Port register bank 0 01h 0 0 0 0 0 1 IP1 read only Input Port register bank 1 02h 0 0 0 0 1 0 IP2 read only Input Port register bank 2 03h 0 0 0 0 1 1 IP3 read only Input Port register bank 3 04h 0 0 0 1 0 0 IP4 read only Input Port register bank 4 05h 0 0 0 1 0 1 - - reserved for future use 06h 0 0 0 1 1 0 - - reserved for future use 07h 0 0 0 1 1 1 - - reserved for future use |
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