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CBTL02042BBQ Datasheet(PDF) 7 Page - NXP Semiconductors |
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CBTL02042BBQ Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 16 page CBTL02042A_CBTL02042B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 1 — 10 March 2011 7 of 16 NXP Semiconductors CBTL02042A; CBTL02042B 3.3 V, 2 differential channel, 2 : 1 MUX/deMUX switch for PCIe Gen2 12. Dynamic characteristics [1] Typical values are at VDD = 3.3 V; Tamb =25 °C, and maximum loading. Table 7. Dynamic characteristics VDD =3.3 V ± 10 %; Tamb = −40 °C to +85 °C; unless otherwise specified. Symbol Parameter Conditions Min Typ[1] Max Unit DDIL differential insertion loss channel is OFF f=100MHz - −50 - dB f=2.5GHz - −25 - dB channel is ON f=100MHz - −0.5 - dB f=2.5GHz - −1.2 - dB DDNEXT differential near-end crosstalk adjacent channels are ON f=100MHz - −50 - dB f=2.5GHz - −30 - dB B−3dB −3 dB bandwidth - 7.0 - GHz DDRL differential return loss f = 100 MHz - −25 - dB f=2.5GHz - −20 - dB Ron ON-state resistance VDD = 3.3 V; VI =2V; II =19mA - 6 - Ω tPD propagation delay from Port A to Port B, or Port A to Port C, or vice versa -80 - ps Switching characteristics tstartup start-up time supply voltage valid or XSD going LOW to channel specified operating characteristics --10 ms tPZH OFF-state to HIGH propagation delay - - 300 ns tPZL OFF-state to LOW propagation delay - - 70 ns tPHZ HIGH to OFF-state propagation delay - - 50 ns tPLZ LOW to OFF-state propagation delay - - 50 ns tsk(dif) differential skew time intra-pair - 5 - ps tsk skew time inter-pair - - 35 ps |
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