E710AHF datasheet(4/17 Pages) SEMTECH

Part #	E710AHF

Description	500 MHz Pin Electronics Driver, Window Comparator, and Load

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Manufacturer	SEMTECH [Semtech Corporation]

Direct Link	http://www.semtech.com

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 2000 Semtech Corp.

www.semtech.com

EDGE HIGH-PERFORMANCE PRODUCTS

Edge710

Circuit Description

Driver

Introduction

The driver will force DOUT to one of three states:

1. DVH (Drive High)

2. DVL (Drive Low)

3. HiZ

(High Impedance).

Both driver digital control inputs (DHI / DHI*, DRV_EN /

DRV_EN*) are "Flex Inputs" - wide voltage differential inputs

capable of receiving ECL, TTL, CMOS, or custom level

signals.

Single-ended operation is supported by

connecting the inverting input to the appropriate DC

threshold level.

Drive Enable

The drive enable (DRV_EN / DRV_EN*) inputs control

whether the driver is forcing a voltage, or is placed in a

high-impedance state. If DRV_EN is more positive than

DRV_EN*, the output will force either DVH or DVL,

depending on the driver data input. If DRV_EN is more

negative that DRV_EN*, the output goes into a high

impedance state.

Do NOT leave DRV_EN / DRV_EN* floating.

Driver Data

The driver data inputs (DHI / DHI*) determine whether the

driver output is forcing a high or a low. If DHI is more

positive than DHI*, the driver will force DVH when the

driver is active. If DHI is more negative than DHI*, the

driver will force DVL when active.

Do NOT leave DHI / DHI* floating.

Table 1. Driver Control Truth Table

Driver Levels

DVH and DVL are high input impedance voltage controlled

inputs which establish the driver levels of a logical "1" and

"0" respectively.

Driver Level Buffer Compensation

DVH_CAP and DVL_CAP are op amp compensation pins

for the high and low level on-chip buffers. Each pin requires

a 0.01

µF chip capacitor (with good high frequency

characteristics) connected to ground. A tight layout with

minimal distance between the pin and the capacitor is

recommended.

Driver Bias

The BIAS pin is an analog current input which establishes

an on-chip bias current, from which other currents are

generated. This current, to some degree, also establishes

the overall power consumption and performance of the

chip. Ideally, an external current source would be used to

minimize any part-to-part performance variation within a

test system. However, a precision external resistor tied to

a large positive voltage is acceptable. (See figure below.)

The optimal BIAS current is a function of the RADJ and

FADJ settings, and cannot be set independently.

The established bias current follows the equation:

BIAS = (VCC - 0.7) / (Rext + 1.5).

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