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Electronic Components Datasheet Search |
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71M6113-IF Datasheet(PDF) 16 Page - Maxim Integrated Products |
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71M6113-IF Datasheet(HTML) 16 Page - Maxim Integrated Products |
16 / 19 page ![]() PDS_6xxx_010 71M6xxx Data Sheet v1.2 © 2008–2011 Teridian Semiconductor Corporation 16 DETAIL A PARTING LINE 5 5° +3° -5° 0.64 +0.25 -0.23 4.6 Package Outline Drawing Controlling dimensions are in mm. Figure 8: SOIC-8 Package Outline BOTTOM VIEW SIDE VIEW SEE DETAIL A END VIEW TOP VIEW 5.99 +0.21 -0.05 1.97 2.465 COO 10 4.93 -0.13 +0.05 4 0.41 +0.08 -0.06 9 1.27 BSC 0.33 ± 0.08 x 45° 1.63 +0.10 -0.08 0.15 +0.1 - 0.023 SEATING PLANE 1.47 +0.08 -0.07 3.94 +0.05 -0.13 0.20 +0.05 -0.01 4 8 3 LENGTH OF TERMINAL FOR SOLDERING TO SUBSTRATE 5 FORMED LEADS ARE PLANAR WITH RESPECT TO EACH OTHER WITHIN 0.735 mm AT SEATING PLANE. 8 10 COUNTRY OF ORIGIN LOCATION ON PACKAGE BOTTOM IS OPTIONAL AND DEPENDS ON ASSEMBLY LOCATION. PACKAGE IS COMPLIANT WITH JEDEC STANDARD MS-012. REFERENCE DATUM 3 LENGTH AND WIDTH ARE REFERENCE DATUMS AND DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS, BUT INCLUDE MOLD MISMATCH. MEASURED AT THE MOLD PARTING LINE. PROTRUSIONS DO NOT EXCEED 0.1524 mm AT END AND 0.254 mm AT WINDOW. 4 9 THE APPEARANCE OF PIN #1 I.D. IS OPTIONAL. DIMENSIONING AND TOLERANCES PER ANSI Y14.5 M - 1982 NOTES: |
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