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CYRF69103 Datasheet(PDF) 22 Page - Cypress Semiconductor

Part # CYRF69103
Description  Programmable Radio on Chip Low Power 16-bit free running timer
Download  68 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYRF69103 Datasheet(HTML) 22 Page - Cypress Semiconductor

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CYRF69103
Document #: 001-07611 Rev *F
Page 22 of 68
The SRAM address of the first of the 64 bytes to be stored in
Flash must be indicated using the POINTER variable in the
parameter block (SRAM address FBh). Finally, the CLOCK and
DELAY values must be set correctly. The CLOCK value deter-
mines the length of the write pulse that is used to store the data
in the Flash. The CLOCK and DELAY values are dependent on
the CPU. Refer to ‘Clocking’ Section for additional information.
14.5.4 EraseBlock Function
The EraseBlock function is used to erase a block of 64
contiguous bytes in Flash. The first thing the EraseBlock function
does is to check the protection bits and determine if the desired
BLOCKID is writable. If write protection is turned on, the Erase-
Block function exits, setting the accumulator and KEY2 back to
00h. KEY1 has a value of 01h, indicating a write failure. The
EraseBlock function is only useful as the first step in
programming. Erasing a block does not cause data in a block to
be one hundred percent unreadable. If the objective is to oblit-
erate data in a block, the best method is to perform an Erase-
Block followed by a WriteBlock of all zeros.
To set up the parameter block for the EraseBlock function,
correct key values must be stored in KEY1 and KEY2. The block
number to be erased must be stored in the BLOCKID variable
and the CLOCK and DELAY values must be set based on the
current CPU speed.
14.5.5 ProtectBlock Function
The CYRF69103 device offers Flash protection on a
block-by-block basis. Table 14-7 lists the protection modes
available. In the table, ER and EW are used to indicate the ability
to perform external reads and writes. For internal writes, IW is
used. Internal reading is always permitted by way of the ROMX
instruction. The ability to read by way of the SROM ReadBlock
function is indicated by SR. The protection level is stored in two
bits, according to Table 14-7. These bits are bit packed into the
64 bytes of the protection block. Therefore, each protection block
byte stores the protection level for four Flash blocks. The bits are
packed into a byte, with the lowest numbered block’s protection
level stored in the lowest numbered bits.
The first address of the protection block contains the protection
level for blocks 0 through 3; the second address is for blocks 4
through 7. The 64th byte stores the protection level for blocks
252 through 255.
The level of protection is only decreased by an EraseAll, which
places zeros in all locations of the protection block. To set the
level of protection, the ProtectBlock function is used. This
function takes data from SRAM, starting at address 80h, and
ORs it with the current values in the protection block. The result
of the OR operation is then stored in the protection block. The
EraseBlock function does not change the protection level for a
block. Because the SRAM location for the protection data is fixed
and there is only one protection block per Flash macro, the
ProtectBlock function expects very few variables in the
parameter block to be set before calling the function. The
parameter block values that must be set, besides the keys, are
the CLOCK and DELAY values.
Table 14-5. WriteBlock Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value, when SSC is
executing
BLOCK ID
0,FAh
8 KB Flash block number (00h–7Fh)
4 KB Flash block number (00h–3Fh)
3 KB Flash block number (00h–2Fh)
POINTER
0,FBh
First 64 addresses in SRAM where
the data to be stored in Flash is
located before calling WriteBlock
CLOCK
0,FCh
Clock Divider used to set the write
Pulse width
DELAY
0,FEh
For a CPU speed of 12 MHz set to 56h
Table 14-6. EraseBlock Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value when SSC is
executed
BLOCKID 0,FAh
Flash block number (00h–7Fh)
CLOCK
0,FCh
Clock Divider used to set the erase
pulse width
DELAY
0,FEh
For a CPU speed of 12 MHz set to
56h
Table 14-7. Protection Modes
Mode
Settings
Description
Marketing
00b
SR ER EW IW Unprotected
Unprotected
01b
SR ER EW IW Read protect
Factory upgrade
10b
SR ER EW IW Disable external
write
Field upgrade
11b
SR ER EW IW Disable internal
write
Full protection
76
54
32
10
Block n+3
Block n+2
Block n+1
Block n
Table 14-8. ProtectBlock Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value when SSC is
executed
CLOCK
0,FCh
Clock Divider used to set the write
pulse width
DELAY
0,FEh
For a CPU speed of 12 MHz set to 56h
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