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CY29940 Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY29940
Description  2.5 V or 3.3 V, 200-MHz, 1:18 Clock Distribution Buffer 200-MHz clock support
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY29940 Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY29940
Document #: 38-07283 Rev. *E
Page 3 of 10
Maximum Ratings[2]
Maximum Input Voltage Relative to VSS............. VSS – 0.3 V
Maximum Input Voltage Relative to VDD............. VDD + 0.3 V
Storage Temperature ................................ –65
C to +150 C
Operating Temperature............................... –40
C to +85 C
Maximum ESD Protection .............................................. 2 kV
Maximum Power Supply................................................ 5.5 V
Maximum Input Current ............................................. ±20 mA
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any voltage
higher than the maximum rated voltages to this circuit. For proper
operation, Vin and Vout should be constrained to the range:
VSS < (Vin or Vout) < VDD
Unused inputs must always be tied to an appropriate logic
voltage level (either VSS or VDD).
DC Parameters[2]
VDD = 3.3 V ± 5% or 2.5 V ± 5%, VDDC = 3.3 V ± 5% or 2.5 V ± 5%, TA = –40 C to +85 C
Parameter
Description
Conditions
Min
Typ
Max
Unit
VIL
Input Low Voltage
VSS
–0.8
V
VIH
Input High Voltage
2.0
VDD
V
IIL
Input Low Current[3]
–200
µA
IIH
Input High Current[3]
––
200
µA
VPP
Peak-to-Peak Input Voltage
PECL_CLK
500
1000
mV
VCMR
Common Mode Range[4]
PECL_CLK
VDD = 3.3 V
VDD – 1.4
VDD – 0.6
V
VDD = 2.5 V
VDD – 1.0
VDD – 0.6
V
VOL
Output Low Voltage[5, 6, 7]
IOL = 20 mA
0.5
V
VOH
Output High Voltage[5, 6, 7]
IOH = –20 mA, VDDC = 3.3 V
2.4
V
IOH = –20 mA, VDDC = 2.5 V
1.8
V
IDDQ
Quiescent Supply Current
5
7
mA
IDD
Dynamic Supply Current
VDD = 3.3 V, Outputs @ 150 MHz,
CL = 15 pF
285
mA
VDD = 3.3 V, Outputs @ 200 MHz,
CL = 15 pF
335
VDD = 2.5 V, Outputs @ 150 MHz,
CL = 15 pF
200
VDD = 2.5 V, Outputs @ 200 MHz,
CL = 15 pF
240
Zout
Output Impedance
VDD = 3.3 V
8
12
16
VDD = 2.5 V
10
15
20
Cin
Input Capacitance
4
pF
Notes
2. Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is not required.
3. Inputs have pull-up/pull-down resistors that effect input current.
4. The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “High” input is within the VCMR range
and the input lies within the VPP specification. Driving series or parallel terminated 50
 (or 50  to VDD/2) transmission lines
5. Outputs driving 50
transmission lines.
6. See Figure 1 on page 5 and Figure 2 on page 5.
7. 50% input duty cycle.
[+] Feedback


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