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CY8C20134 Datasheet(PDF) 7 Page - Cypress Semiconductor |
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CY8C20134 Datasheet(HTML) 7 Page - Cypress Semiconductor |
7 / 47 page CY8C20134, CY8C20234, CY8C20334 CY8C20434, CY8C20534, CY8C20634 Document Number: 001-05356 Rev. *O Page 7 of 47 Pin Information This section describes, lists, and illustrates the CY8C20234, CY8C20334, CY8C20434, CY8C20534, and CY8C20634 PSoC device pins and pinout configurations. The CY8C20x34 PSoC device is available in a variety of packages that are listed and shown in the following tables. Every port pin (labeled with a “P”) is capable of Digital I/O and connection to the common analog bus. However, VSS, VDD, and XRES are not capable of Digital I/O. 8-Pin SOIC Pinout Figure 2. CY8C20134-12SXI 8-Pin SOIC Pinout Table 2. Pin Definitions – CY8C20134 8-Pin (SOIC) Pin No. Digital Analog Name Description 1 Power VSS Ground connection 2 I/O I P0[1] Analog column mux input, integrating input 3 I/O I P1[7] I2C serial clock (SCL) 4 I/O I P1[5] I2C serial data (SDA) 5 I/O I P1[1] I2C serial clock (SCL), ISSP-SCLK 6 I/O I P1[0] I2C serial data (SDA), ISSP-SDATA 7 I/O I P2[2] Analog column mux input 8 Power VDD Supply voltage A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive. SOIC 1 2 3 4 8 7 6 5 Vdd P0[4], A, I P0[2], A, I P1[0], I2CSDA A, I, P0[5] A, I, P0[3] I2C SCL, P1[1] Vss VSS VDD AI, P0[1] AI, I2C SCL, P1[7] AI, I2C SDA, P1[5] P2[2],AI P1[0], I2C SDA, DATA *, AI P1[1], I2C SCL, CLK*, AI [+] Feedback |
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